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literature [2012/11/20 19:12]
hanbiny
literature [2014/09/02 03:31] (current)
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 =====Literature Review===== =====Literature Review=====
 The literature survey instructions are here: {{742-literature-survey-instructions-Fall12.pdf|pdf}} The literature survey instructions are here: {{742-literature-survey-instructions-Fall12.pdf|pdf}}
 +
 +Literature survey presentations from past runs of the course can be viewed {{http://www.ece.cmu.edu/~ece742/2011spring/doku.php?id=project|here}} (click on "Project + Lit Survey" in the left pane).
  
 =====Schedule===== =====Schedule=====
 ^ November 26th (Mon) ^ Name(s) ^ ^ November 26th (Mon) ^ Name(s) ^
-| Slot 1 | | +| Slot 1 | Richard 
-| Slot 2 | | +| Slot 2 | Berkin 
-| Slot 3 | | +| Slot 3 | Hongyi 
-| Slot 4 | | +| Slot 4 | Joe, Paul 
-| Slot 5 | | +| Slot 5 | Jason, Brian 
-| Slot 6 | |+| Slot 6 | Rui, Tyler |
  
 ^ November 28th (Wed) ^ Name(s) ^ ^ November 28th (Wed) ^ Name(s) ^
-| Slot 1 | | +| Slot 1 | Samihan 
-| Slot 2 | | +| Slot 2 | Hyoseung 
-| Slot 3 | | +| Slot 3 | Donghyuk 
-| Slot 4 | | +| Slot 4 | Ben 
-| Slot 5 | | +| Slot 5 | Jamie 
-| Slot 6 | |+| Slot 6 |  |
  
 =====Groups===== =====Groups=====
 ^ Name(s) ^ Literature Survey Papers ^ ^ Name(s) ^ Literature Survey Papers ^
-| Jamie | 1. "An Investigation into Crosstalk Noise in DRAM Structures", MTDT 2002.\\ 2. "Influence of Bit-Line Coupling and Twisting on the Faulty Behavior of DRAMs", TCAD 2006.\\ 3. "Random Telegraph Signal-Like Fluctuation Created by Fowler-Nordheim Stress in Gate Induced Drain Leakage Current of the Saddle Type Dynamic Random Access Memory Cell Transistor", JJAP 2010.\\ |+| Jamie | 1. "Adaptive Self Refresh Scheme for Battery Operated High-Density Mobile DRAM Applications", ASSCC 2006.\\ 2. "RAIDR: Retention-Aware Intelligent DRAM Refresh", ISCA 2012.\\ 3. "Retention-Aware Placement in DRAM (RAPID): Software Methods for Quasi-Non-Volatile DRAM", HPCA 2006.\\ - More papers to be added.\\ |
 | Ben | 1. "The Effectiveness of Multiple Hardware Contexts," ASPLOS 1994.\\ 2. "Fairness and Throughput in Switch on Event Multithreading," MICRO 2006.\\ 3. "Fast thread migration via cache working set prediction," HPCA 2011.\\ - "Cache-Conscious Wavefront Scheduling," MICRO 2012.\\ | | Ben | 1. "The Effectiveness of Multiple Hardware Contexts," ASPLOS 1994.\\ 2. "Fairness and Throughput in Switch on Event Multithreading," MICRO 2006.\\ 3. "Fast thread migration via cache working set prediction," HPCA 2011.\\ - "Cache-Conscious Wavefront Scheduling," MICRO 2012.\\ |
 | Donghyuk | 1. "A 512 Mb Two-Channel Mobile DRAM (OneDRAM) With Shared Memory Array," JSSC 2008.\\ 2. "Scalable high performance main memory system using phase-change memory technology," ISCA 2009.\\ 3. "Automatic CPU-GPU Communication Management and Optimization," PLDI 2011.\\ 4. "Evaluation of existing architectures in IRAM systems," ISCA 1997.\\ 5. "Staged Reads: Mitigating the Impact of DRAM Writes on DRAM Reads," HPCA 2012.\\ - "All points addressable raster display memory," IBM Journal of R&D, Vol 28, No. 4, July 1984.\\ | | Donghyuk | 1. "A 512 Mb Two-Channel Mobile DRAM (OneDRAM) With Shared Memory Array," JSSC 2008.\\ 2. "Scalable high performance main memory system using phase-change memory technology," ISCA 2009.\\ 3. "Automatic CPU-GPU Communication Management and Optimization," PLDI 2011.\\ 4. "Evaluation of existing architectures in IRAM systems," ISCA 1997.\\ 5. "Staged Reads: Mitigating the Impact of DRAM Writes on DRAM Reads," HPCA 2012.\\ - "All points addressable raster display memory," IBM Journal of R&D, Vol 28, No. 4, July 1984.\\ |