This shows you the differences between two versions of the page.
| Both sides previous revision Previous revision | Next revision Both sides next revision | ||
|
readings [2015/09/29 05:53] nandita [Optional Readings Mentioned in the Lecture] |
readings [2015/09/29 05:55] nandita [Optional Readings Mentioned in the Lecture] |
||
|---|---|---|---|
| Line 163: | Line 163: | ||
| * Lee et al., [[https://users.ece.cmu.edu/~omutlu/pub/dram-aware-caches-TR-HPS-2010-002.pdf | DRAM-Aware Last-Level Cache Writeback: Reducing Write-Caused Interference in Memory Systems]], //HPS Technical Report, April 2010.// | * Lee et al., [[https://users.ece.cmu.edu/~omutlu/pub/dram-aware-caches-TR-HPS-2010-002.pdf | DRAM-Aware Last-Level Cache Writeback: Reducing Write-Caused Interference in Memory Systems]], //HPS Technical Report, April 2010.// | ||
| * Ipek et al., [[http://m3.csl.cornell.edu/papers/isca08.pdf | Self Optimizing Memory Controllers: A Reinforcement Learning Approach]], //ISCA 2008// | * Ipek et al., [[http://m3.csl.cornell.edu/papers/isca08.pdf | Self Optimizing Memory Controllers: A Reinforcement Learning Approach]], //ISCA 2008// | ||
| + | * J. Zhao et al., [[https://users.ece.cmu.edu/~omutlu/pub/firm-persistent-memory-scheduling_micro14.pdf | FIRM: Fair and High-Performance Memory Control for Persistent Memory Systems]], //MICRO 2014.// | ||
| + | * M. Qureshi et al., [[http://www.cs.ucsb.edu/~chong/290N-W10/pcm.pdf | Scalable high performance main memory system using phase-change memory technology]], //ISCA 2009.// | ||
| + | |||