Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revision Previous revision
Next revision Both sides next revision
readings [2015/09/29 05:52]
nandita [Optional Readings Mentioned in the Lecture]
readings [2015/09/29 05:53]
nandita [Optional Readings Mentioned in the Lecture]
Line 162: Line 162:
   * Rau, [[http://​citeseerx.ist.psu.edu/​viewdoc/​download?​doi=10.1.1.12.7149&​rep=rep1&​type=pdf | Pseudo-randomly Interleaved Memory]],// ISCA 1991//   * Rau, [[http://​citeseerx.ist.psu.edu/​viewdoc/​download?​doi=10.1.1.12.7149&​rep=rep1&​type=pdf | Pseudo-randomly Interleaved Memory]],// ISCA 1991//
   * Lee et al.,  [[https://​users.ece.cmu.edu/​~omutlu/​pub/​dram-aware-caches-TR-HPS-2010-002.pdf | DRAM-Aware Last-Level Cache Writeback: Reducing Write-Caused Interference in Memory Systems]], //HPS Technical Report, April 2010.//   * Lee et al.,  [[https://​users.ece.cmu.edu/​~omutlu/​pub/​dram-aware-caches-TR-HPS-2010-002.pdf | DRAM-Aware Last-Level Cache Writeback: Reducing Write-Caused Interference in Memory Systems]], //HPS Technical Report, April 2010.//
 +  * Ipek et al., [[http://​m3.csl.cornell.edu/​papers/​isca08.pdf | Self Optimizing Memory Controllers:​ A Reinforcement Learning Approach]], //ISCA 2008//