Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revision Previous revision
Next revision
Previous revision
Next revision Both sides next revision
readings [2015/09/29 05:26]
nandita [Papers Mentioned in the Lecture (Not in Slides)]
readings [2015/09/29 05:35]
nandita [Optional Readings Mentioned in the Lecture]
Line 138: Line 138:
  
 ===== Lecture 5 ===== ===== Lecture 5 =====
 +==== Optional Readings Mentioned in the Lecture ====
 +  * Onur Mutlu and Lavanya Subramanian,​ [[http://​users.ece.cmu.edu/​~omutlu/​pub/​memory-systems-research_superfri14.pdf | Research Problems and Opportunities in Memory
 +Systems]], //Invited Article in Supercomputing Frontiers and Innovations
 +(SUPERFRI), 2015.//
 +  * Lee et al., [[http://​www.cs.rochester.edu/​~ipek/​ieeemicro10.pdf | Phase Change Technology and the Future of Main Memory]], //IEEE Micro 2010//
 +  * Yoongu Kim et. al. [[https://​users.ece.cmu.edu/​~omutlu/​pub/​ramulator_dram_simulator-ieee-cal15.pdf | Ramulator: A Fast and Extensible DRAM Simulator]],​ //IEEE Computer Architecture Letters, May 2015.//
 +  * Yoongu Kim et al., [[ http://​users.ece.cmu.edu/​~omutlu/​pub/​dram-row-hammer_isca14.pdf| Flipping Bits in Memory Without Accessing Them: An Experimental Study of DRAM Disturbance Errors]], //ISCA 2014.//
 +  * Donghyuk Lee et. al., [[https://​users.ece.cmu.edu/​~omutlu/​pub/​tldram_hpca13.pdf | Tiered-Latency DRAM: A Low Latency and Low Cost DRAM Architecture]],​ //HPCA 2013//
 +  * Liu et al., [[http://​users.ece.cmu.edu/​~omutlu/​pub/​raidr-dram-refresh_isca12.pdf | RAIDR: Retention-Aware Intelligent DRAM Refresh]],//​ ISCA 2012.//