Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revision Previous revision
Next revision
Previous revision
Next revision Both sides next revision
readings [2015/09/24 02:57]
nandita [Review Set 4]
readings [2015/09/29 05:30]
nandita [Lecture 5]
Line 4: Line 4:
  
 ===== Recitation 1 ===== ===== Recitation 1 =====
-==== Review Set 1 (due 3 PM)====+==== Review Set 1====
   - Onur Mutlu and Lavanya Subramanian,​ [[http://​users.ece.cmu.edu/​~omutlu/​pub/​memory-systems-research_superfri14.pdf | Research Problems and Opportunities in Memory   - Onur Mutlu and Lavanya Subramanian,​ [[http://​users.ece.cmu.edu/​~omutlu/​pub/​memory-systems-research_superfri14.pdf | Research Problems and Opportunities in Memory
 Systems]], //Invited Article in Supercomputing Frontiers and Innovations Systems]], //Invited Article in Supercomputing Frontiers and Innovations
Line 24: Line 24:
 ===== Recitation 2 ===== ===== Recitation 2 =====
  
-==== Review Set 2 (due 3 PM)====+==== Review Set 2====
   -  Ahn et al., [[ http://​users.ece.cmu.edu/​~omutlu/​pub/​tesseract-pim-architecture-for-graph-processing_isca15.pdf | A Scalable Processing-in-Memory Accelerator for Parallel Graph Processing]], ​ //ISCA 2015.// **[Review Required]**   -  Ahn et al., [[ http://​users.ece.cmu.edu/​~omutlu/​pub/​tesseract-pim-architecture-for-graph-processing_isca15.pdf | A Scalable Processing-in-Memory Accelerator for Parallel Graph Processing]], ​ //ISCA 2015.// **[Review Required]**
   -  Stephen W. Keckler, William J. Dally, Brucek Khailany, Michael Garland, David Glasco, [[ http://​www.cs.nyu.edu/​courses/​spring12/​CSCI-GA.3033-012/​ieee-micro-echelon.pdf | GPUs and the Future of Parallel Computing]],​ IEEE Micro 2011. **[Review Required]**   -  Stephen W. Keckler, William J. Dally, Brucek Khailany, Michael Garland, David Glasco, [[ http://​www.cs.nyu.edu/​courses/​spring12/​CSCI-GA.3033-012/​ieee-micro-echelon.pdf | GPUs and the Future of Parallel Computing]],​ IEEE Micro 2011. **[Review Required]**
Line 51: Line 51:
  
 ===== Recitation 3 ===== ===== Recitation 3 =====
-==== Review Set 3 (due 3 PM) ====+==== Review Set 3 ====
   -  Cai et al., [[ http://​users.ece.cmu.edu/​~omutlu/​pub/​flash-read-disturb-errors_dsn15.pdf | Read Disturb Errors in MLC NAND Flash Memory: Characterization and Mitigation]], ​ //DSN 2015.// **[Review Required]**   -  Cai et al., [[ http://​users.ece.cmu.edu/​~omutlu/​pub/​flash-read-disturb-errors_dsn15.pdf | Read Disturb Errors in MLC NAND Flash Memory: Characterization and Mitigation]], ​ //DSN 2015.// **[Review Required]**
   - Lee et al., [[ http://​users.ece.cmu.edu/​~omutlu/​pub/​pcm_isca09.pdf | Architecting Phase Change Memory as a Scalable DRAM Alternative]],​ //ISCA 2009// **[Review Required]**   - Lee et al., [[ http://​users.ece.cmu.edu/​~omutlu/​pub/​pcm_isca09.pdf | Architecting Phase Change Memory as a Scalable DRAM Alternative]],​ //ISCA 2009// **[Review Required]**
Line 131: Line 131:
   * Meza et. al., [[https://​www.ece.cmu.edu/​~safari/​pubs/​timber_cal12.pdf | Enabling Efficient and Scalable Hybrid Memories]], //IEEE Comp. Arch. Letters, 2012//   * Meza et. al., [[https://​www.ece.cmu.edu/​~safari/​pubs/​timber_cal12.pdf | Enabling Efficient and Scalable Hybrid Memories]], //IEEE Comp. Arch. Letters, 2012//
  
 +==== Papers Mentioned in the Lecture (Not in Slides) ====
 +  * Yoon et. al., [[http://​users.ece.utexas.edu/​~merez/​vecc_asplos_2010.pdf | Virtualized and Flexible ECC for Main Memory]], //ASPLOS 2010//
 +  * Cai et al., [[https://​users.ece.cmu.edu/​~omutlu/​pub/​flash-memory-data-retention_hpca15.pdf | Data Retention in MLC NAND Flash Memory: Characterization,​ Optimization and Recovery]], //HPCA 2015// ​
 +  * Raoux et. al., [[ http://​researcher.watson.ibm.com/​researcher/​files/​us-gwburr/​PCM_IBMJRD.pdf | Phase-change random access memory: A scalable technology]],​ //IBM JRD 2008//
 +  * Qureshi et. al., [[http://​www.cs.ucsb.edu/​~chong/​290N-W10/​pcm.pdf | Scalable High Performance Main Memory System Using Phase-Change Memory Technology]],​ //ISCA 2009//
 +
 +===== Lecture 5 =====
 +==== Optional Readings Mentioned in the Lecture ====
 +  * Onur Mutlu and Lavanya Subramanian,​ [[http://​users.ece.cmu.edu/​~omutlu/​pub/​memory-systems-research_superfri14.pdf | Research Problems and Opportunities in Memory
 +Systems]], //Invited Article in Supercomputing Frontiers and Innovations
 +(SUPERFRI), 2015.//
 +  * Lee et al., [[http://​www.cs.rochester.edu/​~ipek/​ieeemicro10.pdf | Phase Change Technology and the Future of Main Memory]], //IEEE Micro 2010//
 +  * Yoongu Kim et. al. [[https://​users.ece.cmu.edu/​~omutlu/​pub/​ramulator_dram_simulator-ieee-cal15.pdf | Ramulator: A Fast and Extensible DRAM Simulator]],​ //IEEE Computer Architecture Letters, May 2015.//
 +  *