Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revision Previous revision
Next revision Both sides next revision
readings [2015/09/16 04:23]
nandita [Optional Readings Mentioned in Lecture]
readings [2015/09/16 04:30]
nandita [Optional Readings Mentioned in Lecture]
Line 64: Line 64:
    * Seshadri et al., [[http://​users.ece.cmu.edu/​~omutlu/​pub/​in-DRAM-bulk-AND-OR-ieee_cal15.pdf | RowClone: Fast and Energy-Efficient In-DRAM Bulk Data Copy and Initialization ]], //MICRO 2013// ​    * Seshadri et al., [[http://​users.ece.cmu.edu/​~omutlu/​pub/​in-DRAM-bulk-AND-OR-ieee_cal15.pdf | RowClone: Fast and Energy-Efficient In-DRAM Bulk Data Copy and Initialization ]], //MICRO 2013// ​
    * Ahn et al., [[ http://​users.ece.cmu.edu/​~omutlu/​pub/​tesseract-pim-architecture-for-graph-processing_isca15.pdf | A Scalable Processing-in-Memory Accelerator for Parallel Graph Processing]], ​ //ISCA 2015.//    * Ahn et al., [[ http://​users.ece.cmu.edu/​~omutlu/​pub/​tesseract-pim-architecture-for-graph-processing_isca15.pdf | A Scalable Processing-in-Memory Accelerator for Parallel Graph Processing]], ​ //ISCA 2015.//
 +   * Loh et al., [[http://​ag-rs-www.informatik.uni-kl.de/​publications/​data/​Loh08.pdf| 3D-Stacked Memory Architectures for Multi-Core Processors]],​ //ISCA 2008.//
 +   * Dennis et al.,​[[https://​courses.cs.washington.edu/​courses/​cse548/​11au/​Dennis-Dataflow.pdf | A Preliminary Architecture for a Basic Data Flow Processor]]. //ISCA 1974.//