This shows you the differences between two versions of the page.
Both sides previous revision Previous revision Next revision | Previous revision Next revision Both sides next revision | ||
readings [2015/09/13 21:39] nandita [Review Set 2 due (3 PM)] |
readings [2015/09/16 03:50] nandita [Review Set 2 due (3 PM)] |
||
---|---|---|---|
Line 4: | Line 4: | ||
===== Recitation 1 ===== | ===== Recitation 1 ===== | ||
- | ==== Review Set 1 due (3 PM)==== | + | ==== Review Set 1 (due 3 PM)==== |
- Onur Mutlu and Lavanya Subramanian, [[http://users.ece.cmu.edu/~omutlu/pub/memory-systems-research_superfri14.pdf | Research Problems and Opportunities in Memory | - Onur Mutlu and Lavanya Subramanian, [[http://users.ece.cmu.edu/~omutlu/pub/memory-systems-research_superfri14.pdf | Research Problems and Opportunities in Memory | ||
Systems]], //Invited Article in Supercomputing Frontiers and Innovations | Systems]], //Invited Article in Supercomputing Frontiers and Innovations | ||
Line 24: | Line 24: | ||
===== Recitation 2 ===== | ===== Recitation 2 ===== | ||
- | ==== Review Set 2 due (3 PM)==== | + | ==== Review Set 2 (due 3 PM)==== |
- Ahn et al., [[ http://users.ece.cmu.edu/~omutlu/pub/tesseract-pim-architecture-for-graph-processing_isca15.pdf | A Scalable Processing-in-Memory Accelerator for Parallel Graph Processing]], //ISCA 2015.// **[Review Required]** | - Ahn et al., [[ http://users.ece.cmu.edu/~omutlu/pub/tesseract-pim-architecture-for-graph-processing_isca15.pdf | A Scalable Processing-in-Memory Accelerator for Parallel Graph Processing]], //ISCA 2015.// **[Review Required]** | ||
- Stephen W. Keckler, William J. Dally, Brucek Khailany, Michael Garland, David Glasco, [[ http://www.cs.nyu.edu/courses/spring12/CSCI-GA.3033-012/ieee-micro-echelon.pdf | GPUs and the Future of Parallel Computing]], IEEE Micro 2011. **[Review Required]** | - Stephen W. Keckler, William J. Dally, Brucek Khailany, Michael Garland, David Glasco, [[ http://www.cs.nyu.edu/courses/spring12/CSCI-GA.3033-012/ieee-micro-echelon.pdf | GPUs and the Future of Parallel Computing]], IEEE Micro 2011. **[Review Required]** | ||
Line 49: | Line 49: | ||
- Larus, [[http://research.microsoft.com/pubs/70581/tr-2008-69.pdf | Spending Moore's Dividend]] | - Larus, [[http://research.microsoft.com/pubs/70581/tr-2008-69.pdf | Spending Moore's Dividend]] | ||
+ | |||
+ | ===== Recitation 3 ===== | ||
+ | ==== Review Set 3 (due 3 PM) ==== | ||
+ | ==== Optional Readings Mentioned in Lecture ==== | ||