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readings [2015/09/09 05:33] nandita [Optional Readings Mentioned in Lecture] |
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===== Recitation 1 ===== | ===== Recitation 1 ===== | ||
+ | ==== Review Set 1 due (3 PM)==== | ||
- Onur Mutlu and Lavanya Subramanian, [[http://users.ece.cmu.edu/~omutlu/pub/memory-systems-research_superfri14.pdf | Research Problems and Opportunities in Memory | - Onur Mutlu and Lavanya Subramanian, [[http://users.ece.cmu.edu/~omutlu/pub/memory-systems-research_superfri14.pdf | Research Problems and Opportunities in Memory | ||
Systems]], //Invited Article in Supercomputing Frontiers and Innovations | Systems]], //Invited Article in Supercomputing Frontiers and Innovations | ||
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- Onur Mutlu, [[http://users.ece.cmu.edu/~omutlu/pub/mutlu_yale75_visions2014_talk.pdf | Rethinking the Systems We Design]], //Technical talk at A Computer Architecture Workshop: | - Onur Mutlu, [[http://users.ece.cmu.edu/~omutlu/pub/mutlu_yale75_visions2014_talk.pdf | Rethinking the Systems We Design]], //Technical talk at A Computer Architecture Workshop: | ||
Visions for the Future (Celebrating Yale@75) (YALE@75), | Visions for the Future (Celebrating Yale@75) (YALE@75), | ||
- | Austin, TX, September 2014// | + | Austin, TX, September 2014//** [Review Required]** |
- Junwhan Ahn et al., [[ http://users.ece.cmu.edu/~omutlu/pub/tesseract-pim-architecture-for-graph-processing_isca15.pdf | A Scalable Processing-in-Memory Accelerator for | - Junwhan Ahn et al., [[ http://users.ece.cmu.edu/~omutlu/pub/tesseract-pim-architecture-for-graph-processing_isca15.pdf | A Scalable Processing-in-Memory Accelerator for | ||
Parallel Graph Processing]], //Proceedings of the 42nd International Symposium on | Parallel Graph Processing]], //Proceedings of the 42nd International Symposium on | ||
- | Computer Architecture (ISCA), Portland, OR, June 2015.// | + | Computer Architecture (ISCA), Portland, OR, June 2015.// ** [Optional]** |
- | - Vivek Seshadri et al., [[http://users.ece.cmu.edu/~omutlu/pub/in-DRAM-bulk-AND-OR-ieee_cal15.pdf | Fast Bulk Bitwise AND and OR in DRAM]], //IEEE Computer Architecture Letters (CAL), April 2015.// | + | - Vivek Seshadri et al., [[http://users.ece.cmu.edu/~omutlu/pub/in-DRAM-bulk-AND-OR-ieee_cal15.pdf | Fast Bulk Bitwise AND and OR in DRAM]], //IEEE Computer Architecture Letters (CAL), April 2015.//** [Review Required]** |
+ | |||
+ | ==== Optional Readings Mentioned in Lecture ==== | ||
+ | - Smith, [[http://www.cs.utexas.edu/users/mckinley/notes/reviewing-smith.pdf | Task of the Referee]],// IEEE Computer 1990//. | ||
+ | - Hill and McKinley, [[http://www.cs.utexas.edu/users/mckinley/notes/reviewing.html|Notes on Constructive and Positive Reviewing]] | ||
+ | - Thomas Moscibroda and Onur Mutlu, [[http://users.ece.cmu.edu/~omutlu/pub/mph_usenix_security07.pdf | Memory Performance Attacks: Denial of Memory Service | ||
+ | in Multi-Core Systems]], //Proceedings of the 16th USENIX Security Symposium (USENIX SECURITY), | ||
+ | pages 257-274, Boston, MA, August 2007.// | ||
+ | |||
+ | ===== Recitation 2 ===== | ||
+ | |||
+ | ==== Review Set 2 due (3 PM)==== | ||
+ | - Junwhan Ahn, Sungpack Hong, Sungjoo Yoo, Onur Mutlu, and Kiyoung Choi, [[ http://users.ece.cmu.edu/~omutlu/pub/tesseract-pim-architecture-for-graph-processing_isca15.pdf | A Scalable Processing-in-Memory Accelerator for Parallel Graph Processing]], Proceedings of the 42nd International Symposium on Computer Architecture(ISCA), Portland, OR, June 2015. **[Review Required]** | ||
+ | - Stephen W. Keckler, William J. Dally, Brucek Khailany, Michael Garland, David Glasco, [[ http://www.cs.nyu.edu/courses/spring12/CSCI-GA.3033-012/ieee-micro-echelon.pdf | GPUs and the Future of Parallel Computing]], IEEE Micro 2011. **[Review Required]** | ||
+ | - Jeffrey D. Ullman, [[http://cacm.acm.org/magazines/2015/9/191183-experiments-as-research-validation/fulltext | Experiments as Research Validation: Have We Gone Too Far?]], CACM 2015. **[Review Required]** | ||
+ | - Nandita Vijaykumar, Gennady Pekhimenko, Adwait Jog, Abhishek Bhowmick, Rachata Ausavarungnirun, Chita Das, Mahmut Kandemir, Todd C. Mowry, and Onur Mutlu, [[https://users.ece.cmu.edu/~omutlu/pub/caba-gpu-assist-warps_isca15.pdf | A Case for Core-Assisted Bottleneck Acceleration in GPUs: Enabling Flexible Data Compression with Assist Warps]], Proceedings of the 42nd International Symposium on Computer Architecture (ISCA), Portland, OR, June 2015. **[Review Required]** | ||
+ | ==== Optional Readings Mentioned in Lecture ==== | ||
+ | - Moore, [[http://www.cs.utexas.edu/~fussell/courses/cs352h/papers/moore.pdf | Cramming more components onto integrated circuits]], Electronics Magazine, 1965. | ||
+ | - Kuhn, [[http://www.amazon.com/gp/aw/d/B007USH7J2/ref=tmm_kin_title_0?ie=UTF8&qid=&sr= | The structure of scientific revolutions]], 1962. | ||
+ | - Hill and McKinley, [[http://www.cs.utexas.edu/users/mckinley/notes/reviewing.html| Notes on Constructive and Positive Reviewing]] | ||
+ | - Levin and Redell, [[writing-papers.pdf | How (and how not) to write a good systems paper]], OSR 1983. | ||
+ | - Jones, [[http://research.microsoft.com/en-us/um/people/simonpj/papers/giving-a-talk/writing-a-paper-slides.pdf|How to Write a Great Research Paper]] | ||
+ | - Fong, [[rmeta_fong.pdf|How to Write a CS Research Paper: A Bibliography]] | ||
+ | - Junwhan Ahn, Sungjoo Yoo, Onur Mutlu, and Kiyoung Choi, [[ https://users.ece.cmu.edu/~omutlu/pub/pim-enabled-instructons-for-low-overhead-pim_isca15.pdf | PIM-Enabled Instructions: A Low-Overhead, Locality-Aware Processing-in-Memory Architecture]], Proceedings of the 42nd International Symposium on Computer Architecture (ISCA), Portland, OR, June 2015. |