~~NOTOC~~
<note important> **This page is open for editing by anybody.\\ Please be courteous to your fellow students.** </note> 

====== Milestone 2 Appointments ======
Please use this page to schedule an appointment with the T.A.s and the instructor to discuss milestone 2 of your project. \\ 
First, please look up your project number from the following list of projects. Next to your project, is the name of the T.A. assigned to you.\\ 
Afterwards, reserve a slot to meet with your assigned T.A. by editing a slot in the appointment tables below.

====== List of Projects ======
List of projects sorted alphabetically.
  - S. Aboutalib & R. Meireles: Feature Selection for Data Prefetchers → Evangelos
  - R. Aggarwal & M. Telgarsky: Memory Hierarchies for Parallelized DFTs → Evangelos
  - L. Akoglu & C. U. Ezekwe: HyFetch - A Hybrid Method for Prefetching in the light of Cache Feedback → Evangelos
  - M. Beckler & V. Chandrasekaran: Automatic Phase Detection and Adaptation for an Asymmetric Multi-Core Environment → Evangelos
  - Y. Cai & K. Woo: Hardware Implementation of Bufferless Routers → Michael
  - T. Cartolano & G. Nychis: QoS and Fairness in Bufferless Interconnection On-Chip Networks → Michael
  - J. Cheung & M. Ma: Fault Tolerance Architectural Techniques for Efficiently Recovering from Detected Hardware Design Bugs → Michael
  - J. H. Cho: Prefetch-Aware Fair Cache Partitioning → Theo
  - A. Gandhi & Y. Zhuang: Analytical Modeling of System Temperature → Theo
  - D. Han & Y. Kim: Preserving Bank Parallelism in Multiple Multicore Memory Controllers → Theo
  - A. Hartman & C. Tseng → Michael
  - T. Iwanaga & C. Liao: Dynamic Hardware Thread Scheduling in SIMD pipelines → Theo
  - R. Koutsoyannis & R. Sachdeva: Prefetching in a distributed cache system → Evangelos
  - J. Lin & Y. Wu: QoS Aware (Fair) Memory Controllers in the presence of Prefetching → Michael
  - B. Nowak & S. Thompson: Asymmetric MultiCore → Evangelos
  - M. Polte & R. J. Simmons: Attacking and defending PCM-based main memory → Theo
  - A. Sangpetch & K. Vaniea: Visualizing Cache Utilization for Optimizations → Michael
  - Yianli Li & Xin Zhang: More is Less: Denial-of-Service Attacks to Multi-Core Systems → Theo
 
====== Appointments ======
===== Prof. Mutlu & Evangelos Vlachos =====
Reserve appointment for Evangelos (groups 1, 2, 3, 4, 13, 15)

**Thursday, Apr 02 2009, 3:00pm - 6:00pm** 
^Slot^Project Number and Names^
| 3:00pm : 3:30pm | 4, Beckler, Chandrasekaran |
| 3:30pm : 4:00pm | 13, Koutsoyannis, Sachdeva  |
| 4:00pm : 4:30pm | 15, Thompson, Nowak |
| 4:30pm : 5:00pm | 3, Akoglu, Ezekwe |
| 5:00pm : 5:30pm | 2. Telgarsky |
| 5:30pm : 6:00pm | 1, Aboutalib, Meireles |

===== Prof. Mutlu & Michael Papamichael =====
Reserve appointment for Michael (groups 5, 6, 7, 11, 14, 17)

**Friday, Apr 03 2009, 1:00pm - 4:00pm** 
^Slot^Project Number and Names^
| 1:00pm : 1:30pm | 6, Nychis, Cartolano |
| 1:30pm : 2:00pm | Your project number, Last name 1, Last name 2 |
| 2:00pm : 2:30pm | 7, Cheung, Ma |
| 2:30pm : 3:00pm | 17, Vaniea, Sangpetch |
| 3:00pm : 3:30pm | Your project number, Last name 1, Last name 2 |
| 3:30pm : 4:00pm | 11, Hartman, Tseng |

===== Prof. Mutlu & Theodoros Strigkos =====
Reserve appointment for Theo (groups 8, 9, 10, 12, 16, 18)

**Monday, Apr 06 2009, 1:00pm - 2:30pm & 3:30pm - 5:00pm** 
^Slot^Project Number and Names^
| 1:00pm : 1:30pm | 9, Gandhi, Zhuang |
| 1:30pm : 2:00pm | Your project number, Last name 1, Last name 2 |
| 2:00pm : 2:30pm | 16, Polte, Simmons |
| 2:30pm : 3:00pm | SLOT UNAVAILABLE - DO NOT RESERVE THIS SLOT |
| 3:00pm : 3:30pm | SLOT UNAVAILABLE - DO NOT RESERVE THIS SLOT |
| 3:30pm : 4:00pm | 10, Kim, Han |
| 4:00pm : 4:30pm | 12, Iwanaga, Liao |
| 4:30pm : 5:00pm | 18, Li, Zhang |