The fiber optic cables and transceivers arrived yesterday but the digikey parts and DWM1001 did not arrive until today. We plan to devote this weekend to testing out clock signal generation and propagation over fiber optic. We also plan on devoting this weekend to familiarizing ourselves with the DWM1001.
We have worked on improving our Decawave messaging protocol so that the time delay can be accurately transferred over UWB from one transceiver to the other. This will allow us to compute the ToF directly on the CC2650 instead of having our external PC read the TX / RX delay values across two CC2650s, which introduces error due to the lack of synchronization.
March 26, 2018
We received the DWM1001-DEV breakout that we ordered, and configured it to communicate with out breadboard-ed anchor set-up. We are able to read a packet from the DWM1001 and are working on hacking through the board's software stack to change the contents of the packet such that they can be used in our TDoA implementation.
We also implemented frame filtering for our ToF implementation, further stabilizing the timestamp values. We still see an issue where the timestamp differences progressively decrease, suggesting either unstable clocks or a software bug. We are also debugging this.
For the hardware design portion, we are awaiting the fiber optic transceiver breakouts, so that the fiber optic transceivers can be tested for our clock synchronization boards.
Lastly, we updated our theoretical TDoA algorithm to a gradient descent solver in order to better compensate for noise as compared to the least-squares solver. Below is a plot of a simulation of this TDoA algorithm. Red represents the actual path of the tag, blue is the computed path, and green is the location of the anchors.
The anomaly exists due to the TDoA algorithm computing multiple solutions to the intersection of the hyperboloids. In 3D space, this is less of a problem due to the smaller solution space. Increased iterations should be able to reduce the error.
March 29, 2018
There was a mistake in our order of fiber optic transceiver breakout boards, so we are instead relying on a breadboarded
solution for transceiver prototyping. We were able to drive 15 MHz signals through the transmitter and observe them on the
receiver end after they have passed through a 1 meter fiber optic loopback.
An example signal is pictured below. Green and yellow are a differential pair containing the received clock. Purple
shows the reconstructed clock computed as the difference between the receiver outputs.
A picture of our experimental setup:
With this new result in mind, we are refining our approach to clock synchronization while considering a few open questions.
On the transmitter side, we need to determine the appropriate complexity of the circuit required to generate and receive the differential clock
signal. Based on experimental results, we believe that the transmitter can tolerate a common mode component
in the input. This means we may be able to drive the transmitter in a single ended fashion without need of
additional circuitry to create a purely differential signal. It remains to be seen whether using this single
ended approach will result in signal degredation, particularly when a splitter and long cables are used.
On the receiver side, we are more certain of our approach despite the reliance on the untested EL5375 amplifier.
We still believe that a differential amplifier is the cleanest and most reliable way of extracting the clock and
SYNC signals from the transceiver outputs. Our experimental results suggest that our current approach is correct
in terms of amplifier gain, DC offset, and signal termination.
Our next step will be to revise our clock synchronization design based on the information gained from this experiment.
Once the design is finalized, we will fabricate and attempt to perform clock synchronized TDoA with the DWM1000 modules.
April 4, 2018
For our demo, we set up a basic clock sync by placing the tag at a location equidistant from all three anchors and using a single
UWB pulse to get a reference time stamp. The following image shows how we placed the tag with respect to the three anchors around the room.
The following image shows the timestamps that we received from this method. Although the clocks are synchronized at a macro-level,
the clock drift is too large for any meaningful TDOA localization to be done.
On the fiber optic end, we tested our current transceiver circuit with a PLL outputting a 40 MHz source signal. The following image shows that
we were able to obtain the differential signal needed for sending the clock and sync signals over the fiber optic cables.
Our division of labor recently has been as follows:
Connor - Breadboarding the fiber optic transceiver circuit, fiber optic transceiver PCB schematic and routing, ordering parts, testing out DWM1001, testing out PLL
Ethan - Wrote TDOA gradient descent solver, BLE interface on external PC, setting up demo, testing out PLL
Sid - Anchor PCB schematic and routing, programming CC2650 for demo, testing out DWM1001 Android App
For the upcoming weeks we plan to devote our attention towards refining the fiber optic transceiver circuit and going through several iterations of
PCBs for the the fiber optic transceiver. Lots of soldering and testing work needs to be done in the near future. Our primary goal in two weeks is to hook
up the fiber optic cables to the clock and sync lines on the DWM1000 and achieve a clock sychronized network of anchors.
April 12, 2018
Many supplies recently came in this week. Every team member worked together towards testing the components and ensuring that the expected behavior is achieved.
We tested out the TCXO and verified that it does indeed output a 38.4 MHz clock signal. However, we found that the peak to peak voltage was too low to be used by our transceiver circuit, so we intend to amplify it using the EL5375 op amp. The EL5375 is shown below.
We also tested out the breakout boards for the fiber optic FS Transceivers, which are shown below.
We have verified that we can send and receive a 1 MHz signal between two separate devices using the breakout boards. The waveform from the oscilloscope is shown below.
We are currently in the process of testing out the EL5375 op amp to amplify the TCXO signal. After we have verified it then we will know that the transmitter side of the circuit is correct. We will next test out whether the DWM1000 accepts the clock signal generated from the TCXO and from our fiber optic transceiver.
April 19, 2018
For the past week, we've been working on amplifying the clock signal from the TCXO such that it can be be converted to a digital signal. We've been working with the EL5375 op-amp in order to accomplish this. Unfortunately, we have hit a roadblock with this part. Despite the EL5375 having a gain-bandwidth product of 200 MHz (far above our desired ~76.8 MHz gain-bandwidth product), we fail to observe a greater gain greater than unity for most frequencies tested.
Our clock will essentially be an output from the TCXO (albeit processed slightly). In order to confirm that the DW1000 will accept this as a clock, we worked on replacing the oscillator on a DWM1000 with the TCXO. This involved reverse engineering the connections to the oscillator on the DWM1000, desoldering that oscillator, and soldering ours instead. We concluded that the DWM1000 will accept the TCXO signal.
Today, we began working with the new op-amps, which is working more predictably. We have managed to obtain a sinusoidal signal from the TCXO, coming out of the op-amp, that has a gain of at least 2!
April 26, 2018
This past week, we continued debugging the op-amp circuit to provide us with a signal that can eventually be transmitted over fiber optic cables and used by the DecaWave as a clock. Using one of the new op-amps, we were able to see a 38.4 MHz clock on the receiver end of the fiber optic circuit, with controllable gain and with an amplitude that can be read by the DecaWave IC.
The next step was to try to pipe this signal into the DecaWave IC. We used the same method as before, where we solder the clock signal to the appropriate pins on the DW1000 IC that is mounted on one of our DWM1000 boards. Unfortunately, the clock was not sufficiently clean enough for the DW1000's internal PLL to lock.
We moved to clean up the clock signal on the receiving side, which was accomplished through a buffer amplifier, and we are no longer receiving an error stating that the PLL is failing to lock. However, we are still experiencing issues with SPI communication between the cc2650 and DWM1000 using this new custom clock, and are currently debugging that
May 3, 2018
We began investigating whether using an LC filter to clean up the received signal could work for making the DW1000 accept the clock signal on the receiving end.
We have also created our final PCB schematic which integrates the fiber optic receiver and the DWM1000. The PCB also includes a variety of capacitors and inductors for tuning a band pass filter to allow only the 38.4 MHz signal to go through. The final PCB schematic is shown below.
For our final demo we plan to set up anchors around the room and use the oscilloscope to display the clock signal being received from the clock generator on the TCXO side.
