On Sunday we met to begin our implementation of the simulator. We began work on the C implementation of the octree data structure for representing 3D spaces. I implemented some of the methods, and also reworked our build system to use a Makefile.
On Monday and Tuesday, I made some further contributions to the octree data structure. I also reorganized our main RRT repo and modified the Makefile to match the project structure.
On Wednesday, I shifted my focus to thinking about how the state space (representation of the environment) will be compressed and sent to the FPGA. Our solution has the FPGA doing only the acceleration of motion planning, with the host CPU doing all other work. Thus, the CPU is responsible for perception, and also sending the perception data to the FPGA. The perception data will be stored in an octree, but we are not sure if an octree is the best data structure for the FPGA.
On Thursday, I met with Chris and Yufei to contribute to the design slides. I also spent some time thinking about how motion planning can be parallelized for the FPGA. Some ideas came from a paper I read on parallelizing RRT. I also picked up an FPGA that we ordered, and so I am in the middle of getting a Vitis HLS environment set up so that we can build our accelerator.
Next week, Chris and Yufei will hopefully have their ends of the simulation environment set up, so I might be able to strap them together with our octree to see if we can get something running. I will also continue with the HLS environment, and try running an unoptimized software version of RRT running.