Neelansh’s Status Report for 4/28

What did you personally accomplish this week on the project? Give files or photos that demonstrate your progress. Prove to the reader that you put sufficient effort into the project over the course of the week (12+ hours). 

Last week, I worked on more testing, ensuring that the system works, and also preparing for the final presentation that we had on Wednesday. This week wasn’t as much work as we had given a lot of time in the previous weeks to be at a safe position.

Is your progress on schedule or behind? If you are behind, what actions will be taken to catch up to the project schedule? 

The progress is on schedule.

What deliverables do you hope to complete in the next week?

We have our final presentation next week and will spend time preparing for that and ensuring our final solution is well tested and correct in all aspects. 

List all unit tests and overall system tests carried out for experimentation of the system. List any findings and design changes made from your analysis of test results and other data obtained from the experimentation.

There weren’t any major design changes on my part, except the fact that we went from a QuadSPI implementation to a SPI implementation, as that worked for our needs.

For the tests, we carried out all the tests as described in the final presentation. This included the range test, where we held the remote camera node and the receiver 50m apart, with multiple obstacles in between, and were still able to send and receive the frames with less than 10% drops.

Another test was the battery test, where we ran the system for 24 hours and were able to continuously see it working.

Another test for my part was using the logic analyzer to see that the SPI implementation is working correctly and the bytes transferred are padded, and in the right order. This test also included integration with the FPGA and making of the entire system.



Neelansh’s Status Report for 4/20

As you’ve designed, implemented and debugged your project, what new tools or new knowledge did you find it necessary to learn to be able to accomplish these tasks? What learning strategies did you use to acquire this new knowledge? 

I was not familiar with ESP32s which is one of the most important microcontrollers we are using in this project. I had to learn from youtube videos, online tutorials and websites on how to set it up and get the entire project working. I had to consult friends who are proficient in it to learn and get advice on. 

I learnt about using the IDF environment, SPI interfacing, and working with microcontrollers. My biggest learning strategy was trying to find things out from the internet or books, and being ready to ask for help and advice from my peers and mentors in the process.

We recognize that there are quite a few different methods (i.e. learning strategies) for gaining new knowledge — one doesn’t always need to take a class, or read a textbook to learn something new. Informal methods, such as watching an online video or reading a forum post are quite appropriate learning strategies for the acquisition of new knowledge.

Yes, I agree with this statement completely. I had never worked with microcontrollers in the past before, since I had always been more on the pure software side of things. However, when tasked with working on making the ESP32 act as an Access Point and writing code for the SPI interface, I had to research online forums, especially during debugging. I had to ask my teammates for help at times and ask professors and TAs about any doubts I had. These experiences are valuable and make me understand the importance of all different resources available to learn and gain knowledge from.

What did you personally accomplish this week on the project? Give files or photos that demonstrate your progress. Prove to the reader that you put sufficient effort into the project over the course of the week (12+ hours). 

I worked on developing the SPI interface and ensuring it works correctly. I then worked on adding more features to the data such as adding padding and making it 4 byte aligned to allow for easier decoding on the FPGA end. I then worked on manual testing in Schenley Park with my teammates and did analysis on data we collected.

Is your progress on schedule or behind? If you are behind, what actions will be taken to catch up to the project schedule? 

It is on schedule.

What deliverables do you hope to complete in the next week?

I will be working on testing and making the entire 6 camera nodes system work well within our constraints. We also need to prepare and work for the presentation and the final demo.



Team’s Status Report for 4/6

What are the most significant risks that could jeopardize the success of theproject? How are these risks being managed? What contingency plans are ready?

The risks that are yet to be fully quantified are the issue of range and the receiving capabilities of the central ESP. 

In regards to the issue of range, we already have some data points to compare against. The first is that we were able to get about 30 meters of range indoors and in a non-line of sight situation though two thick brick walls. From this, we judge that it is likely that a 50 meter range is achievable in a wilderness environment where there is minimal interference from neighboring access points and where there isn’t a need for the signal to penetrate multiple brick walls. Should it not be possible to reach the 50 meter range figure we can always install antennas that are more directional. The current external antennas that we have are 3dBi omni directional antennas which can be easily replaced with higher gain antennas if needed. To verify we can just set up a camera and receiving node in Schenley Park and keep track of the distance until the stream drops. The test can be run under a variety of different conditions, for example in an open area with direct line of sight and then in a wooded area where the line of sight is blocked by a couple of trees. Terrain would have to be accounted for as well since in the wilderness, it can be guaranteed that every node is at the same elevation.

The current knowledge of the receiving capabilities of the central ESP is that it is able to handle one stream of camera data right now. We have yet to do testing beyond that. While we do have 6 cameras, most of the time the system will have at most one active stream. This is because the cameras will only send data when there is movement and not send data when there isn’t. Thus, it is unlikely that all 6 cameras will be active and sending data to the central node at once. In case that we do run into processing limitations on the central ESP, we can always drop the quality of the frames which will decrease the transmission size which in turn will lower the processing demand. Alternatively, we can also just include a second ESP to split the load. This is the less preferred option because it adds extra complexity.

Were any changes made to the existing design of the system (requirements,

block diagram, system spec, etc)? Why was this change necessary, what costs

does the change incur, and how will these costs be mitigated going forward?

The main change is on the front of the FPGA. Due to logic element sizing and time constraints, the JPEG decoder and the video driver will be split into two different FPGAs. This does increase the price of the central node but it is within our budget of $150.

Provide an updated schedule if changes have occurred

No changes

This is also the place to put some photos of your progress or to brag about a component you got working.

Validation Plan

One of the validation plans will be to ensure that the communication between the central ESP and the FPGAs is steady. The metrics for this will be twofold, a counter will be implemented on the FPGA so that we know what is the data rate that the ESP is streaming data to the FPGA. In addition to that, performance counters on the JPEG decoder will be added so that we know how many invalid JPEG frames are received.

In terms of actual metrics, we expect to see 60 JPEG frames transmitted every second by the ESP. Then, we expect to see that no more than 10% of the transmitted JPEG frames are invalid.

We will also perform testing via sending varying forms of input, images with different gradients, colors, patterns, to ensure robustness. We will also work on ensuring that multiple camera streams are still able to transmit simultaneously, to ensure that the system works under high pressure (all 6 cameras sensing and streaming).  The receiver node needs to be able to handle all the 6 incoming streams, and then transmit them to the FPGA for further processing.

Neelansh’s Status Report for 6th April, 2024

What did you personally accomplish this week on the project? Give files or photos that demonstrate your progress. Prove to the reader that you put sufficient effort into the project over the course of the week (12+ hours). 

This week I worked on finalizing everything for the demo, since our demo was on Wednesday for us. I developed and tested the ESP32 receiver node and worked with my teammates to allow for transmission from not just one ESP32, but from multiple different ESP32s acting as STA’s to one single ESP32, acting as an AP. 

I then worked on the one part I was unable to display in the demo, the SPI interface. I developed the entire SPI interface and then tested it via Oscilloscopes and Arduinos to ensure that the entire transmission via the interface was working, and that we were sending the correct byte streams.

Is your progress on schedule or behind? If you are behind, what actions will be taken to catch up to the project schedule? 

I am on schedule.

What deliverables do you hope to complete in the next week?

Next week I plan on integrating these two parts : receiving data from multiple streams, and then sending it to the FPGA via the SPI interface. After that I would work with my teammates to start building a module and then start testing the entire system.

Now that you have some portions of your project built, and entering into the verification and validation phase of your project, provide a comprehensive update on what tests you have run or are planning to run. In particular, how will you analyze the anticipated measured results to verify your contribution to the project meets the engineering design requirements or the use case requirements?  

For the verification of my work, I plan on conducting exhaustive tests to measure the correctness and efficiency of my system.

I am currently able to send basic data from one ESP32 to the other and receive it correctly with 100% correctness (no packet drops). 

I plan on sending real time image data (to simulate real world use cases) from multiple ESP32s acting as STA (remote node), to one single ESP32 acting as the AP (receiver node), with multiple data access points. I would then test this with multiple ESP32s sending data at a single point of time to satisfy the use case requirements set in the earlier stages of having at least 6 different camera nodes being able to transmit data simultaneously. 

Apart from this, I would also test the SPI interface with oscilloscopes to ensure that all the 6 different camera streams are coming in correctly. This would also include testing in real life scenarios, with variations in the distance between the sender and receiver (10m, 20m, 30m, … until failure), and also with varying number of objects in between them to try and recreate the camping site. I will go to Schenley park and conduct my tests there to ensure that the trees or the foliage does not cause my system to fail. Lastly, I would run the entire system for hours at stretch (try to find the breaking point), and use python scripts to continuously test for correctness and ensure that the packet losses are within the limits set earlier.  

 

Neelansh’s Status Report for 30th March, 2024

What did you personally accomplish this week on the project? Give files or
photos that demonstrate your progress. Prove to the reader that you put sufficient
effort into the project over the course of the week (12+ hours).

I worked on the SPI interface and setting everything up, including data access points on the receiver ESP32 node, setting up the SPI interface and then transmitting data through it, ensuring that the data is not just garbled bytes but actual legitimate data, and then worked on ensuring the entire system works together as one module. This involved setting everything up together, using oscilloscopes to measure the data being transmitted via the SPI interface, and then also sending and receiving data from multiple ESP32s.

Is your progress on schedule or behind? If you are behind, what actions will be
taken to catch up to the project schedule?

It is on schedule.

What deliverables do you hope to complete in the next week?

Next week I plan on doing the interim demo, and working with my teammates on getting their components ready for a final test, and then start joining the individual components built by each of us together.

Neelansh’s Status Report for 23rd March, 2024

What did you personally accomplish this week on the project? Give files or photos that demonstrate your progress. Prove to the reader that you put sufficient effort into the project over the course of the week (12+ hours). 

This week was a long one. I worked on building the QuadSPI interface for transmitting data from the receiver ESP32 to the lattice ECP5 FPGA. This involved understanding the firmware of the FPGA to understand how to set up the quad data transfer points and send bits. I also had to write code to set up the SPI on the ESP32 after reading and understanding the entire manual. I had to experiment with the clock speed, configure the Quad SPI mode based on the clock polarity and clock phase that would match the FPGA (slave device). All these tasks involved reading, writing code, and extensive debugging. I also attended the ethics seminar and actively contributed to the discussion.

Is your progress on schedule or behind? If you are behind, what actions will be taken to catch up to the project schedule? 

The project is on schedule.

What deliverables do you hope to complete in the next week?

Next week, I plan on integrating the QuadSPI interface with the ESP32 and start receiving data on the ESP32, serializing it, and then transmitting it to the connected FPGA to simulate real world conditions. 



Neelansh’s Status Report for 16th March, 2024

What did you personally accomplish this week on the project? Give files or photos that demonstrate your progress. Prove to the reader that you put sufficient effort into the project over the course of the week (12+ hours). 

This week I worked on setting up the ESP32 data access points and ensuring that the code I have written in the IDF environment works. This included connecting an ESP32 to my computer, setting up the entire toolchain, figuring out the necessary dependencies and writing code to set up the data access points on the ESP32. 

After that, I started to transfer data. At first I wrote code to check if I can open a simple webpage saying “Hello World” based on some online tutorials, and after that I started sending more and more data. I tried to measure the data transfer rate of the ESP32 by sending in large amounts of data in the range 65535 bytes and upwards since that would be what we will be sending in the final product.

Is your progress on schedule or behind? If you are behind, what actions will be taken to catch up to the project schedule? 

The project is still on schedule.

What deliverables do you hope to complete in the next week?

For the next week, I plan on finishing up the receiver module by setting up the data access points completely and finding the thresholds of the data transfer rate, also work on other aspects of the project such as the drivers and encoders needed to transfer the data to the FPGA on the receiver node.



Neelansh’s Status Report for 9th March, 2024

What did you personally accomplish this week on the project? Give files or photos that demonstrate your progress. Prove to the reader that you put sufficient effort into the project over the course of the week (12+ hours).

 Over the past week, I started working with the ESP32, and worked on writing code to be able to receive data from my personal computer. I tried sending random bits and then other values, trying to emulate the real world situation of sending compressed frames and then receiving and serializing them. I was able to successfully receive the transmitted data and ensure that the data frames lost were within the limit specified in our requirements ( <10%). I also started reading on other current architecture and solutions present, and read a few research papers and websites which related to fast data transmission and receiving via wireless networks (especially ESP32s). 

Is your progress on schedule or behind? If you are behind, what actions will be taken to catch up to the project schedule?

We are on schedule and things are going as per plan. 

What deliverables do you hope to complete in the next week?

In the coming week, I plan on developing the receiver node’s physical architecture with my partners, and also work on completing my code, along with extensive real world testing to ensure adequate transmission and receiving of data as per the requirements set in our design. Apart from this, I would also be working on developing a detailed testing plan with the exact metrics, and start initial testing.



Team Status report for 24th February, 2024

What are the most significant risks that could jeopardize the success of the project? How are these risks being managed? What contingency plans are ready?

Currently the major risks we have are ensuring that enough frames are transmitted from the remote camera nodes to the central receiver node, ensuring that our threshold of less than 10% frames being dropped is not crossed. Another issue is the fast decompression of these 6 incoming frames on the FPGA so that the streaming on the monitor is seamless and without any glitches. 

As explained in our presentations, we plan on testing these things in the coming week, and if we face issues with transmission, we plan on adding more data access points on the receiver ESP32, and if there are compute complexities with the FPGA, then we plan on trying to work more on optimizing the system verilog code or try doing some computation on the EPS32 or perhaps switch to a larger FPGA as a worst case scenario. 

Were any changes made to the existing design of the system (requirements, block diagram, system spec, etc)? Why was this change necessary, what costs does the change incur, and how will these costs be mitigated going forward?

Currently no major changes have been made to the system and we are working as per our initial design plan.

Provide an updated schedule if changes have occurred. 

No changes have occurred on our schedule as of now. Things are on track.

This is also the place to put some photos of your progress or to brag about a component you got working.

Here is a video of the FPGA driving a display with the Arduino commanding pixel values: https://photos.app.goo.gl/LBfp1qN6J4SgLGJp9

 

Neelansh’s Status Report for 24th February, 2024

What did you personally accomplish this week on the project? Give files or photos that demonstrate your progress. Prove to the reader that you put sufficient effort into the project over the course of the week (12+ hours). 

This past week I worked with my teammates on perfecting the design presentation and solidifying our use case. We then worked on doing more calculations and research on finalizing the hardware and software stack to be used.

I have started working on developing the code for the receiver node (the ESP32 on the receiver node which will then transmit the received data frames to the FPGA). I have finalized the tool chain setup and have figured out how the complete implementation will work. The ESP32 Wifi-Setup has also been completed and I am now working on actually transmitting the data and completing the initial physical hardware setup. I also started testing the code for the JPEG decompression algorithm in C, which will then be used by my teammates to convert into System Verilog and apply on the FPGA. Me and Michael have already tested on a few test images, and the code does seem to work well, giving us a compression ratio of about 5.75:1, which is good enough for our needs. 

Is your progress on schedule or behind? If you are behind, what actions will be taken to catch up to the project schedule? 

We are currently on schedule and all things are on track. If any problems occur, we plan on using the mitigation strategies discussed in our proposal and design presentations. 

What deliverables do you hope to complete in the next week?

In the next week, I will be working on writing the JPEG Buffer which will store the incoming data frames from all the remote camera nodes. I will also be working with my teammates on helping them with their parts and ensuring overall progress of the project.