Team E0: To the 60's and Back

This week I prepared for the proposal presentation and then gave the presentation. The bulk of the work I did was designing the cpu pipeline and making a detailed diagram about it. A second thing I did was doing research about the simulation and synthesis tool chain I would use to compile my processor the code I want to run on it and then simulate or synthesize it. Lastly I started the presentation slides for the design review. Thus far I am on schedule as my goal for the week was to design the cpu pipeline and finalize what my tool chain would look like for synthesis and simulation. The next week I hope to create the presentation slides and find an I2C verilog IP that we can use in our design.