My task for this week was sharing synthesizing the design on the chip with Donny. However due to Donny being behind I ended up writing the parent module and the transmit module of the IO unit for Donny. I also synthesize the design and made the fixes necessary by myself. However since Donny was not done with the receiving module as of the writing of this I could not synthesize the entire design (basically was just missing the receiving module). Even though we are technically slightly behind (could not synthesize) hopefully we will finish that in our meeting today. Our plan for next week is integration. None of use really have a specific task because we will all be there to help debug our prospective bugs if any come up during that. In addition we should probably make the slides for the final presentation which I believe is in 2 weeks (we will likely each claim a few slides for that)
Bringing the Apollo Guidance Computer to the 21st century