This week, I was able to complete my part of the presentation, help with making the physical mat, and gather testing data.
Collectively, we planned out our final presentation on Monday, and figured out the necessary information we needed. This helped us plan our testing for Wednesday as well. I was particularly involved with FSR error rate and coverage testing. While Spandan or Caio stepped on the mat, I took down the number of missed hits and recorded data in a table. This data will be shown in the final presentation. On Friday, I was also involved in the planning of the top layer of the mat, as well as making necessary physical measurements.
Individually, I worked on the slides for ‘use case requirements’, ‘complete solution’ and FSR testing. I also learnt how to crimp connector pins to awg wires. After watching some videos on it and practicing it on spare wire, I was able to get the hang of it. I spent a lot of time on Friday learning this and attaching male connector pins + housing to 20 wires coming out from the FSRs. This will allow us to easily connect and debug the FSRs to the female headers on the perfboard. With this the circuit layer is completely ready.
As per my plans last week, I was able to complete my goals for this week. For the upcoming week, I will be contributing to finishing whatever’s left for the physical mat. I am hoping that we are able to test the entire system after the completion of the mat.