techdocs
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techdocs [2014/01/12 22:47] varun |
techdocs [2015/04/20 20:06] rachata |
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| ===== Processor Manuals ===== | ===== Processor Manuals ===== | ||
| + | |||
| + | ==== MIPS ==== | ||
| + | Throughout this course, we will use the MIPS Architecture Reference Manual as the definitive specification for the MIPS ISA. All other MIPS-related material provided below are only for your benefit. | ||
| + | |||
| + | * {{mips_r4000_users_manual.pdf| (1.5MB) MIPS R4000 Microprocessor User’s Manual (1994)}} | ||
| + | * {{mips_reference_data.pdf|MIPS Cheat Sheet (from P&H)}} | ||
| + | * {{mips_tutorial.pdf|MIPS Tutorial (pdf)}} | ||
| + | * {{mips_tutorial.ppt|MIPS Tutorial (ppt)}} | ||
| ==== x86 ==== | ==== x86 ==== | ||
| Line 16: | Line 24: | ||
| * (Note: IA-64 is different from Intel 64 and is **not** an x86 ISA.) | * (Note: IA-64 is different from Intel 64 and is **not** an x86 ISA.) | ||
| - | ==== ARM ==== | ||
| - | * ARM Architecture Reference Manual | ||
| - | * [[https://www.scss.tcd.ie/~waldroj/3d1/arm_arm.pdf|Manual (5MB)]] | ||
| - | * ARM Architecture Instruction Quick Reference | ||
| - | * [[arm-instructionset.pdf|Quick Ref (.5MB)]] | ||
| ==== Alpha ==== | ==== Alpha ==== | ||
| Line 31: | Line 34: | ||
| * {{vax_archhbkvol1_1977.pdf|(11MB) VAX11/780 Architecture Handbook (1977)}} | * {{vax_archhbkvol1_1977.pdf|(11MB) VAX11/780 Architecture Handbook (1977)}} | ||
| * {{vax_hwhbk_1979.pdf|(15MB) VAX11/780 Hardware Handbook (1979)}} | * {{vax_hwhbk_1979.pdf|(15MB) VAX11/780 Hardware Handbook (1979)}} | ||
| + | |||
| + | |||
| + | ==== LC-3b (from Patt and Patel) ==== | ||
| + | * (CMU WebISO) [[http://www.ece.cmu.edu/~ece447/cmu_only/pp-appendixa.pdf|P&P Appendix A (The LC-3b ISA)]] | ||
| + | * (CMU WebISO) [[http://www.ece.cmu.edu/~ece447/cmu_only/pp-appendixc.pdf|P&P Appendix C (The Microarchitecture of the LC-3b, Basic Machine)]] | ||
| + | * {{lc3b-figures.pdf|LC-3b Figures from Appendix C}} | ||
| + | * {{18447-lc3b-pipelining.pdf|Pipelined LC-3b Microarchitecture}} | ||
| + | |||
| + | ==== ARM ==== | ||
| + | * ARM Architecture Reference Manual | ||
| + | * [[https://www.scss.tcd.ie/~waldroj/3d1/arm_arm.pdf|Manual (5MB)]] | ||
| + | * ARM Architecture Instruction Quick Reference | ||
| + | * {{arm-instructionset.pdf|Quick Ref (.5MB)}} | ||
| + | * ARM university teaching material: {{http://www.arm.com/support/university/educators/architecture/index.php| Link}} | ||
| + | * There are interesting and potentially useful slides on the ARM ISA: | ||
| + | * {{http://www.arm.com/files/ppt/ARM_Teaching_Material.ppt| ARM Teaching material}} | ||
| + | * {{http://www.arm.com/files/ppt/ARM_Processors_and_Architectures_-_Uni_Program_.pptx| ARM Univ. Program}} | ||
| + | * {{http://www.arm.com/files/pdf/ARM_Arch_A8.pdf| A8 Architecture}} | ||
| ===== Software Tools ===== | ===== Software Tools ===== | ||
| Line 36: | Line 57: | ||
| ==== Cadence ==== | ==== Cadence ==== | ||
| * ''ncvlog.pdf'': {{ncvlog.pdf| Cadence NC-Verilog Simulator Help 8.2 (2008)}} | * ''ncvlog.pdf'': {{ncvlog.pdf| Cadence NC-Verilog Simulator Help 8.2 (2008)}} | ||
| - | * ''simvision.pdf'': {{simvision.pdf|SimVision User Guide 8.2 (2009)}} | ||
| - | * ''simviscmdref.pdf'': {{simviscmdref.pdf|SimVision Command Language Reference 8.2 (2009)}} | ||
| ==== Xilinx ==== | ==== Xilinx ==== | ||
| * ''xst.pdf'': [[http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_2/xst.pdf|XST User Guide for Virtex-4, | * ''xst.pdf'': [[http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_2/xst.pdf|XST User Guide for Virtex-4, | ||
| Virtex-5, Spartan-3, and Newer CPLD Devices 14.2 (2010)]] | Virtex-5, Spartan-3, and Newer CPLD Devices 14.2 (2010)]] | ||
| + | |||
| + | ==== System Verilog Tutorials ==== | ||
| + | * {{http://www.asic-world.com/systemverilog/tutorial.html|ASIC World System Verilog Tutorial}} | ||
| + | * {{http://www.eda.org/sv/SystemVerilog_3.1a.pdf|SystemVerilog 3.1a Language Reference Manual}} | ||
| + | |||
| + | ==== Verilog Tutorials ==== | ||
| + | While this class will focus on System Verilog, these Verilog manuals are useful for additional studies: | ||
| + | * {{synth-verilog-cummins.pdf|Cummings, Nonblocking Assignments in Verilog Synthesis, Coding Styles That Kill}} | ||
| + | * {{goodrtl-parkin.pdf|Parkin, Writing Successful RTL Descriptions in Verilog}} | ||
| + | * {{18447-sv-to-verilog.pdf|18-447 Handout: Moving from System Verilog to Verilog}} | ||
| + | * [[http://users.ece.utexas.edu/~patt/12s.382N/tools/verilog_manual.html|Online Verilog Manual (UT-Austin EE 382N)]] | ||
| + | * {{hdlcv.pdf|HDL Compiler for Verilog Reference Manual by Synopsys.}} | ||
techdocs.txt · Last modified: 2015/04/20 22:40 by rachata
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