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==== ARM ==== | ==== ARM ==== | ||
- | Throughout this course, we will use the ARM User's Manual as the definitive specification for the ARM ISA. All other ARM-related material provided below are only for your benefit. | + | Throughout this course, we will use the ARM Architecture Reference Manual as the definitive specification for the ARM ISA. All other ARM-related material provided below are only for your benefit. |
- | * {{arm_full_reference.pdf|ARM Full Reference}} | + | * {{arm_full_reference.pdf|ARM Architecture Reference Manual}} |
* {{arm-instructionset.pdf|ARM Instruction Set (pdf)}} | * {{arm-instructionset.pdf|ARM Instruction Set (pdf)}} | ||
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* ''xst.pdf'': [[http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_2/xst.pdf|XST User Guide for Virtex-4, | * ''xst.pdf'': [[http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_2/xst.pdf|XST User Guide for Virtex-4, | ||
Virtex-5, Spartan-3, and Newer CPLD Devices 14.2 (2010)]] | Virtex-5, Spartan-3, and Newer CPLD Devices 14.2 (2010)]] | ||
+ | |||
+ | ==== Verilog Tutorials ==== | ||
+ | While this class will focus on System Verilog, these manuals are useful for additional studies: | ||
+ | * {{synth-verilog-cummins.pdf|Cummings, Nonblocking Assignments in Verilog Synthesis, Coding Styles That Kill}} | ||
+ | * {{goodrtl-parkin.pdf|Parkin, Writing Successful RTL Descriptions in Verilog}} | ||
+ | * {{18447-sv-to-verilog.pdf|18-447 Handout: Moving from System Verilog to Verilog}} | ||
+ | * [[http://users.ece.utexas.edu/~patt/12s.382N/tools/verilog_manual.html|Online Verilog Manual (UT-Austin EE 382N)]] |