This shows you the differences between two versions of the page.
Both sides previous revision Previous revision | Next revision Both sides next revision | ||
techdocs [2014/01/11 15:23] rachata |
techdocs [2014/01/11 15:23] rachata |
||
---|---|---|---|
Line 38: | Line 38: | ||
Virtex-5, Spartan-3, and Newer CPLD Devices 14.2 (2010)]] | Virtex-5, Spartan-3, and Newer CPLD Devices 14.2 (2010)]] | ||
- | ===== Verilog Tutorials ===== | ||
- | * {{synth-verilog-cummins.pdf|Cummings, Nonblocking Assignments in Verilog Synthesis, Coding Styles That Kill}} | ||
- | * {{goodrtl-parkin.pdf|Parkin, Writing Successful RTL Descriptions in Verilog}} | ||
- | * {{18447-sv-to-verilog.pdf|18-447 Handout: Moving from System Verilog to Verilog}} | ||
- | * [[http://users.ece.utexas.edu/~patt/12s.382N/tools/verilog_manual.html|Online Verilog Manual (UT-Austin EE 382N)]] |