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| Welcome to the wiki for 18-447, Introduction to Computer Architecture for Spring 2014! | Welcome to the wiki for 18-447, Introduction to Computer Architecture for Spring 2014! | ||
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| + | =====Announcements===== | ||
| + | |||
| + | * Lecture room change: CIC 4th floor, Panther Hollow conference room | ||
| + | * Lab 2 is now available. | ||
| + | * Homework 2 is now available. | ||
| =====Course Information===== | =====Course Information===== | ||
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| ====Description==== | ====Description==== | ||
| - | Computer architecture is the science and art of selecting and interconnecting hardware components and designing the hardware/software interface to create a computer that meets functional, performance, energy consumption, cost, and other specific goals. This course introduces the basic hardware structure of a modern programmable computer, including the basic laws underlying performance evaluation. We will learn, for example, how to design the control and data path hardware for a MIPS-like processor, how to make machine instructions execute simultaneously through pipelining and simple superscalar execution, and how to design fast memory and storage systems. The principles presented in the lecture are reinforced in the laboratory through the design and simulation of a register transfer level (RTL) implementation of a MIPS-like pipelined processor in Verilog. In addition, we will develop a cycle-accurate simulator of this processor in C, and we will use this simulator to explore processor design options. | + | Computer architecture is the science and art of selecting and interconnecting hardware components and designing the hardware/software interface to create a computer that meets functional, performance, energy consumption, cost, and other specific goals. This course introduces the basic hardware structure of a modern programmable computer, including the basic laws underlying performance evaluation. We will learn, for example, how to design the control and data path hardware for a ARM-like processor, how to make machine instructions execute simultaneously through pipelining and simple superscalar execution, and how to design fast memory and storage systems. The principles presented in the lecture are reinforced in the laboratory through the design and simulation of a register transfer level (RTL) implementation of a MIPS-like pipelined processor in Verilog. In addition, we will develop a cycle-accurate simulator of this processor in C, and we will use this simulator to explore processor design options. |
| * **Prerequisites:** 18-240 and (15-213 or 18-243) and (18-320 or 18-340 or 18-341 or 18-348 or 18-349) | * **Prerequisites:** 18-240 and (15-213 or 18-243) and (18-320 or 18-340 or 18-341 or 18-348 or 18-349) | ||
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| ====Meeting Times==== | ====Meeting Times==== | ||
| - | * **Lecture**: Mon., Wed., & Fri. 12:30PM -- 2:20PM, Scaife Hall 219 | + | * **Lecture**: Mon., Wed., & Fri. 12:30PM -- 2:20PM, CIC 4th floor Panther Hollow |
| - | * **Lab** | + | * **Recitation** |
| - | * Section A: Tue. 10:30AM -- 1:20PM, Hamerschlag Hall 1303 | + | * Section A: Tue. 11:00AM -- 1:20PM, Hamerschlag Hall 1303 |
| * Section B: Thu. 1:30PM -- 4:20PM, Hamerschlag Hall 1303 | * Section B: Thu. 1:30PM -- 4:20PM, Hamerschlag Hall 1303 | ||
| * Section C: Fri. 6:30PM -- 9:20PM, Hamerschlag Hall 1303 | * Section C: Fri. 6:30PM -- 9:20PM, Hamerschlag Hall 1303 | ||
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| ^ ^ Name ^ E-mail ^ Office ^ Phone ^ Office Hours ^ | ^ ^ Name ^ E-mail ^ Office ^ Phone ^ Office Hours ^ | ||
| | **Instructor** | [[http://www.ece.cmu.edu/~omutlu/|Onur Mutlu]] | <onur@cmu.edu> | CIC 4105| (412) 268-1186 | Wed. 2:30--3:30PM (or by appointment)| | | **Instructor** | [[http://www.ece.cmu.edu/~omutlu/|Onur Mutlu]] | <onur@cmu.edu> | CIC 4105| (412) 268-1186 | Wed. 2:30--3:30PM (or by appointment)| | ||
| - | | **Grad TA** | [[http://users.ece.cmu.edu/~rausavar/|Rachata Ausavarungnirun]] | <rachata@cmu.edu> | CIC 4th Floor | -- | TBA | | + | | **Teaching Assistant (PhD)** | [[http://users.ece.cmu.edu/~rausavar/|Rachata Ausavarungnirun]] | <rachata@cmu.edu> | CIC 4th Floor | -- | Wed. 4:30--6:30PM | |
| - | | **IMB Student TA** | Xiao Bo Zhao | <xiaoboz@andrew.cmu.edu> | TBA | -- | TBA | | + | | **Teaching Assistant (IMB)** | Xiao Bo Zhao | <xiaoboz@andrew.cmu.edu> | ECE Coves (HH 1300 Wing) | -- | Tues. 4:30--6:30PM | |
| - | | **IMB Student TA** | Varun Kohli | <vkohli@andrew.cmu.edu> | TBA | -- | TBA | | + | | **Teaching Assistant (IMB)** | Varun Kohli | <vkohli@andrew.cmu.edu> | ECE Coves (HH 1300 Wing) | -- | Thurs. 4:30--6:30PM | |
| - | | **IMB Student TA** | Paraj Tyle | <ptyle@cmu.edu> | TBA | -- | TBA | | + | | **Teaching Assistant (IMB)** | Paraj Tyle | <ptyle@cmu.edu> | ECE Coves (HH 1300 Wing) | -- | Fri. 3:00--5:00PM | |
| | **Admin. Assistant** | [[http://www.ece.cmu.edu/directory/details/4615|Shannon Lown]] | <shannonh@ece.cmu.edu> | Hamerschlag Hall Course Hub | (412) 268-5448 | -- | | | **Admin. Assistant** | [[http://www.ece.cmu.edu/directory/details/4615|Shannon Lown]] | <shannonh@ece.cmu.edu> | Hamerschlag Hall Course Hub | (412) 268-5448 | -- | | ||
| ====Building Locations==== | ====Building Locations==== | ||
start.txt · Last modified: 2015/04/13 19:15 by rachata
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