start
Differences
This shows you the differences between two versions of the page.
| Both sides previous revision Previous revision Next revision | Previous revision Next revision Both sides next revision | ||
|
start [2014/01/11 15:44] rachata [Contact] |
start [2015/01/11 23:11] kevincha [Contact] |
||
|---|---|---|---|
| Line 1: | Line 1: | ||
| ~~NOTOC~~ | ~~NOTOC~~ | ||
| - | ====== 18-447 Introduction to Computer Architecture – Spring 2014 ====== | + | ====== 18-447 Introduction to Computer Architecture – Spring 2015 ====== |
| - | Welcome to the wiki for 18-447, Introduction to Computer Architecture for Spring 2014! | + | Welcome to the wiki for 18-447, Introduction to Computer Architecture for Spring 2015! |
| + | |||
| + | =====Announcements===== | ||
| + | |||
| + | None | ||
| =====Course Information===== | =====Course Information===== | ||
| Line 9: | Line 13: | ||
| ====Description==== | ====Description==== | ||
| - | Computer architecture is the science and art of selecting and interconnecting hardware components and designing the hardware/software interface to create a computer that meets functional, performance, energy consumption, cost, and other specific goals. This course introduces the basic hardware structure of a modern programmable computer, including the basic laws underlying performance evaluation. We will learn, for example, how to design the control and data path hardware for a MIPS-like processor, how to make machine instructions execute simultaneously through pipelining and simple superscalar execution, and how to design fast memory and storage systems. The principles presented in the lecture are reinforced in the laboratory through the design and simulation of a register transfer level (RTL) implementation of a MIPS-like pipelined processor in Verilog. In addition, we will develop a cycle-accurate simulator of this processor in C, and we will use this simulator to explore processor design options. | + | Computer architecture is the science and art of selecting and interconnecting hardware components and designing the hardware/software interface to create a computer that meets functional, performance, energy consumption, cost, and other specific goals. This course introduces the basic hardware structure of a modern programmable computer, including the basic laws underlying performance evaluation. We will learn, for example, how to design the control and data path hardware for a ARM-like processor, how to make machine instructions execute simultaneously through pipelining and simple superscalar execution, and how to design fast memory and storage systems. The principles presented in the lecture are reinforced in the laboratory through the design and simulation of a register transfer level (RTL) implementation of a MIPS-like pipelined processor in Verilog. In addition, we will develop a cycle-accurate simulator of this processor in C, and we will use this simulator to explore processor design options. |
| * **Prerequisites:** 18-240 and (15-213 or 18-243) and (18-320 or 18-340 or 18-341 or 18-348 or 18-349) | * **Prerequisites:** 18-240 and (15-213 or 18-243) and (18-320 or 18-340 or 18-341 or 18-348 or 18-349) | ||
| Line 15: | Line 19: | ||
| ====Syllabus==== | ====Syllabus==== | ||
| **Subject to change.** | **Subject to change.** | ||
| - | * {{:syllabus-18-447-Mutlu-S14.pdf|Syllabus}} | + | * {{:syllabus-18-447-mutlu-s15.pdf|Syllabus}} |
| ====Meeting Times==== | ====Meeting Times==== | ||
| - | * **Lecture**: Mon., Wed., & Fri. 12:30PM -- 2:20PM, Scaife Hall 219 | + | * **Lecture**: Mon., Wed., & Fri. 12:30PM -- 2:20PM, Hamerschlag Hall 1107 |
| - | * **Lab** | + | * **Recitation** |
| - | * Section A: Tue. 10:30AM -- 1:20PM, Hamerschlag Hall 1303 | + | * Section A: Tue. 11:00AM -- 1:20PM, Hamerschlag Hall 1303 |
| * Section B: Thu. 1:30PM -- 4:20PM, Hamerschlag Hall 1303 | * Section B: Thu. 1:30PM -- 4:20PM, Hamerschlag Hall 1303 | ||
| * Section C: Fri. 6:30PM -- 9:20PM, Hamerschlag Hall 1303 | * Section C: Fri. 6:30PM -- 9:20PM, Hamerschlag Hall 1303 | ||
| + | |||
| ====Textbooks==== | ====Textbooks==== | ||
| Line 41: | Line 46: | ||
| ^ ^ Name ^ E-mail ^ Office ^ Phone ^ Office Hours ^ | ^ ^ Name ^ E-mail ^ Office ^ Phone ^ Office Hours ^ | ||
| | **Instructor** | [[http://www.ece.cmu.edu/~omutlu/|Onur Mutlu]] | <onur@cmu.edu> | CIC 4105| (412) 268-1186 | Wed. 2:30--3:30PM (or by appointment)| | | **Instructor** | [[http://www.ece.cmu.edu/~omutlu/|Onur Mutlu]] | <onur@cmu.edu> | CIC 4105| (412) 268-1186 | Wed. 2:30--3:30PM (or by appointment)| | ||
| - | | **Grad TA** | [[http://users.ece.cmu.edu/~rausavar/|Rachata Ausavarungnirun]] | <rachata@cmu.edu> | CIC 4th Floor | -- | TBA | | + | | **Teaching Assistant (PhD)** | [[http://users.ece.cmu.edu/~rausavar/|Rachata Ausavarungnirun]] | <rachata@cmu.edu> | TBD | -- | TBD | |
| - | | **Undergrad TA** | Xiao Bo Zhao | <xiaoboz@andrew.cmu.edu> | TBA | -- | TBA | | + | | **Teaching Assistant (PhD)** | [[http://users.ece.cmu.edu/~kevincha/|Kevin Chang]] | <kevincha@cmu.edu> | TBD | -- | TBD | |
| - | | **Undergrad TA** | Varun Kohli | <vkohli@andrew.cmu.edu> | TBA | -- | TBA | | + | | **Teaching Assistant (IMB)** | Albert Cho | <aycho@andrew.cmu.edu> | TBD | -- | TBD | |
| - | | **Admin. Assistant** | [[http://www.ece.cmu.edu/directory/details/4615|Shannon Lown]] | <shannonh@ece.cmu.edu> | Hamerschlag Hall Course Hub | (412) 268-5448 | -- | | + | | **Teaching Assistant (IMB)** | Jeremie Kim | <jeremiek@cmu.edu> | TBD | -- | TBD | |
| + | | **Teaching Assistant (IMB)** | Clement Loh | <krov.clement@gmail.com> | TBD | -- | TBD | | ||
| + | | **Admin. Assistant** | [[http://www.ece.cmu.edu/directory/details/4615|Zara Collier]] | <shannonh@ece.cmu.edu> | Hamerschlag Hall Course Hub | (412) 268-5448 | -- | | ||
| ====Building Locations==== | ====Building Locations==== | ||
| * Hamerschlag Hall: [[http://goo.gl/maps/cfrIN|Google Maps]] | * Hamerschlag Hall: [[http://goo.gl/maps/cfrIN|Google Maps]] | ||
| * CIC (Collaborative Innovation Center): [[http://goo.gl/maps/o5Nbh|Google Maps]] | * CIC (Collaborative Innovation Center): [[http://goo.gl/maps/o5Nbh|Google Maps]] | ||
| - | * Scaife Hall [[http://goo.gl/maps/Ocb6v|Google Maps]] | ||
start.txt · Last modified: 2015/04/13 19:15 by rachata
Page Tools
Except where otherwise noted, content on this wiki is licensed under the following license: CC Attribution-Share Alike 3.0 Unported
