readings
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readings [2015/03/23 19:53] jeremie |
readings [2015/03/25 21:06] albert |
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| "Data Retention in MLC NAND Flash Memory: Characterization, Optimization and Recovery," | "Data Retention in MLC NAND Flash Memory: Characterization, Optimization and Recovery," | ||
| Proceedings of the 21st International Symposium on High-Performance Computer Architecture (HPCA), Bay Area, CA, February 2015. }} | Proceedings of the 21st International Symposium on High-Performance Computer Architecture (HPCA), Bay Area, CA, February 2015. }} | ||
| - | * {{coarchitecting-kang.pdf| Kang+, "Co-Architecting Controllers and DRAM to Enhance DRAM Process Scaling" | + | * {{coarchitecting-kang.pdf| Kang+, "Co-Architecting Controllers and DRAM to Enhance DRAM Process Scaling"}} |
| + | |||
| + | ===== Lecture 22 (3/25 Wed.) ===== | ||
| + | **Required:** | ||
| + | * {{tldram-lee.pdf| Lee et al., “Tiered-Latency DRAM: A Low Latency and Low Cost DRAM Architecture,” HPCA 2013. (Sections 1 and 2)}} | ||
| + | * {{2012_isca_salp.pdf| Kim et al., “A Case for Subarray-Level Parallelism (SALP) in DRAM,” ISCA 2012. (Sections 1 and 2)}} | ||
| + | * {{raidr_isca12.pdf| Liu et al., “RAIDR: Retention-Aware Intelligent DRAM Refresh,” ISCA 2012. (Sections 1 and 2)}} | ||
| + | * {{main-memory-system_kiise15.pdf| Onur Mutlu, Justin Meza, and Lavanya Subramanian, "The Main Memory System: Challenges and Opportunities," Invited Article in Communications of the Korean Institute of Information Scientists and Engineers (KIISE), 2015.}} | ||
readings.txt · Last modified: 2015/04/13 19:31 by kevincha
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