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readings [2015/02/24 18:12]
kevincha
readings [2015/02/28 07:15]
jeremie
Line 202: Line 202:
   * {{:​ieee_proceedings_2001_-_compiler_techniques.pdf|Faraboschi et al., “Instruction Scheduling for Instruction Level Parallel Processors,​” Proc. IEEE, Nov. 2001.   * {{:​ieee_proceedings_2001_-_compiler_techniques.pdf|Faraboschi et al., “Instruction Scheduling for Instruction Level Parallel Processors,​” Proc. IEEE, Nov. 2001.
 }} }}
 +
 +===== Lecture 17 (2/25 Wed.) =====
 +**Required:​**
 +  * {{00877947.pdf|Huck,​ J., Morris, D., Ross, J., Knies, A., Mulder, H., & Zahir, R. (2000). Introducing the IA-64 architecture. IEEE Micro.}}
 +  * P&H Chapters 5.1-5.3 (cache chapters)
 +  * Hamacher et al. Chapters 8.1-8.7 (cache/​memory chapters)
 +  * {{wilkes_-_1965_-_slave_memories_and_dynamic_storage_allocation.pdf|Wilkes,​ M. V. (1965). Slave Memories and Dynamic Storage Allocation. IEEE Transactions on Electronic Computers.}}
 +  * {{:​liptay68.pdf|Liptay,​ “Structural aspects of the System/360 Model 85 II: the cache,” IBM Systems Journal, 1968.
 +}}
 +
 +===== Lecture 18 (2/27 Fri.) =====
 +**Required:​**
 +  * {{wilkes_-_1965_-_slave_memories_and_dynamic_storage_allocation.pdf|Wilkes,​ M. V. (1964). Slave Memories and Dynamic Storage Allocation. IEEE Transactions on Electronic Computers.}}
 +  * {{A_Case_For_MLP_Aware_Cache_Replacement.pdf|nQureshi et al., “A Case for MLP-Aware Cache Replacement,​“ ISCA 2006.}}
 +  * P&H Chapters 5.1-5.3 (cache chapters)
 +  * Hamacher et al. Chapters 8.1-8.7 (cache/​memory chapters)
 +  * {{A_Study_of_replacement_algorithms_for_a_virtual-storage_computer.pdf|qBelady,​ “A study of replacement algorithms for a virtual-storage computer,​” IBM Systems Journal, 1966.}}
readings.txt · Last modified: 2015/04/13 19:31 by kevincha