readings
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readings [2015/01/12 19:02] kevincha |
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| * (CMU WebISO) [[http://www.ece.cmu.edu/~ece447/cmu_only/pp-appendixc.pdf|P&P Appendix C (The Microarchitecture of the LC-3b, Basic Machine)]] | * (CMU WebISO) [[http://www.ece.cmu.edu/~ece447/cmu_only/pp-appendixc.pdf|P&P Appendix C (The Microarchitecture of the LC-3b, Basic Machine)]] | ||
| * **P&H** stands for Patterson & Hennessy's //Computer Organization and Design: The Hardware/Software Interface// | * **P&H** stands for Patterson & Hennessy's //Computer Organization and Design: The Hardware/Software Interface// | ||
| + | |||
| + | ====== Guides on how to review papers critically ====== | ||
| + | * Lecture slides: {{onur-447-s15-how-to-do-the-paper-reviews.pdf | pdf}} {{onur-447-s15-how-to-do-the-paper-reviews.ppt | Slides ppt}} | ||
| + | * Example reviews on "Main Memory Scaling: Challenges and Solution Directions" (link to the paper) | ||
| + | * {{review-chapter.pdf | Review 1}} | ||
| + | * {{review-chapter-2.pdf | Review 2}} | ||
| + | * Example review on "Staged memory scheduling: Achieving high performance and scalability in heterogeneous systems" (link to the paper) | ||
| + | * {{review-sms.pdf | Review 1}} | ||
| + | |||
| ===== Lecture 1 (1/12 Mon.) ===== | ===== Lecture 1 (1/12 Mon.) ===== | ||
| **Required:** | **Required:** | ||
| - | * None | + | * For HW1: {{00964437.pdf|Patt, Y. (2001). Requirements, bottlenecks, and good fortune: agents for microprocessor evolution. Proceedings of the IEEE.}} |
| **Mentioned during lecture:** | **Mentioned during lecture:** | ||
readings.txt · Last modified: 2015/04/13 19:31 by kevincha
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