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readings [2014/01/15 20:59]
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readings [2014/01/22 22:11]
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     * {{arm-instructionset.pdf|Quick Ref (.5MB)}}     * {{arm-instructionset.pdf|Quick Ref (.5MB)}}
   * Intel® 64 and IA-32 Architectures Software Developer Manual (2013)   * Intel® 64 and IA-32 Architectures Software Developer Manual (2013)
-    * [[http://​download.intel.com/​products/​processor/​manual/​325462.pdf|(15MB) Combined Volumes 1-3]]+    * [[http://​download.intel.com/​products/​processor/​manual/​325462.pdf|(15MB) Combined Volumes 1-3]]
 + 
 +**Mentioned during lecture:​** 
 +  * P&H Chapter 4, Sections 4.1-4.4. 
 +  * (CMU WebISO) [[http://​www.ece.cmu.edu/​~ece447/​cmu_only/​pp-appendixc.pdf|P&​P Appendix C (The Microarchitecture of the LC-3b, Basic Machine)]] 
 +  * P&P Chapter 5 (The LC3) 
 +  * {{p25-patterson.pdf|Patterson,​ D. A., & Ditzel, D. R. (1980). The case for the reduced instruction set computer. SIGARCH Comput. Archit. News, 8(6).}} 
 +  * [[http://​www.ece.cmu.edu/​~koopman/​stack_computers/​sec3_2.html | Koopman, P. (1989) Stack Computers: The New Wave.]] 
 +  * {{chapter9.pdf|Levy,​ H. (1984). Capability-Based Computer Systems. Chapter 9. The Intel iAPX 432.}} 
 +  * {{p489-wilner.pdf|Wilner,​ W. T. (1972). Design of the Burroughs B1700. Proceedings of the December 5-7, 1972, fall joint computer conference, part I. }} 
 + 
 + 
 +===== Lecture 4 (1/22 Wed.) ===== 
 +**Required** 
 +  * (CMU WebISO) [[http://​www.ece.cmu.edu/​~ece447/​cmu_only/​PP_Chap4.pdf|P&​P Chapter 4 (The von Neumann Model)]] 
 +  * (CMU WebISO) [[http://​www.ece.cmu.edu/​~ece447/​cmu_only/​pp-appendixa.pdf|P&​P Appendix A (The LC-3b ISA)]] 
 +  * (CMU WebISO) [[http://​www.ece.cmu.edu/​~ece447/​cmu_only/​pp-appendixc.pdf|P&​P Appendix C (The Microarchitecture of the LC-3b, Basic Machine)]] 
 + 
 +===== Lecture 5 (1/24 Fri.) ===== 
 +**Required** 
 +  * None
readings.txt · Last modified: 2015/04/13 19:31 by kevincha