User Tools

Site Tools


labs

Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revision Previous revision
Next revision
Previous revision
Next revision Both sides next revision
labs [2014/04/30 03:37]
rachata
labs [2015/01/14 00:47]
kevincha [Lab 1: Instruction Level MIPS Simulator (Due: Fri. 1/23)]
Line 3: Line 3:
 ====== Labs ====== ====== Labs ======
  
-===== Lab 1: Instruction Level ARM Simulator (Due: Fri. 1/24) ===== +===== Lab 1: Instruction Level MIPS Simulator (Due: Fri. 1/23) ===== 
- +  
-  {{lab1.pdf|Lab 1 Handout}} +   ​[[https://milkshark.ics.cs.cmu.edu/courses/25/assessments/11 Autolab]] 
-  * {{lab1.tar|Lab 1 Starter Code}} +   ​* {lab1-handout.tar]]
-  * {{lab1_dist.pdf|Lab 1 Grade Distribution}} +
-===== Lab 1.5SystemVerilog Warm-Up (Due: Never) ===== +
- +
-  * {{lab1.5.pdf|Lab 1.5 Handout}} +
- +
-===== Lab 2: Single Cycle ARM (Due: Fri. 2/7)===== +
- +
-  * {{lab2.pdf|Lab 2 Handout}} +
-  * {{lab2.tar.gz|Lab 2 Starter Code}} +
-  * {{lab2_dist.pdf|Lab 2 Grade Distribution}} +
- +
-===== Lab 3: Pipelining (Due: Fri2/21)===== +
- +
-  * {{lab3.pdf|Lab 3 Handout}} +
-  * {{lab3_grades.pdf|Lab 3 Grade Distribution}} +
- +
-===== Lab 4a: Branch Prediction (Due: Fri. 3/21)===== +
- +
-  * {{lab4.pdf|Lab 4a Handout}} +
- +
-===== Lab 4b: Fine-Grained Multithreading (Due: Fri. 3/21)===== +
- +
-  * {{lab4b.pdf|Lab 4b Handout}} +
- +
-===== Lab 5: Simulating Caches and Branch Prediction (Due: Sun. 4/6)===== +
- +
-  * {{lab5.pdf|Lab 5 Handout}} +
-  * {{lab5_starter.tar.gz|Lab 5 Starter Code}} +
-  * [[lab5_faq|Lab 5 FAQs]] +
- +
-===== Lab 6: Memory Hierarchy (Due: Sun. 4/​20)===== +
- +
-  * {{lab6.pdf|Lab 6 Handout}} +
- +
- +
-===== Lab 7: Multicore and Cache Coherence (Due: Fri. 5/2)===== +
- +
-  * (Accept late submissions until May 9) +
-  * {{lab7.pdf|Lab 7 Handout}}+
labs.txt · Last modified: 2017/09/17 00:10 by jeremie