labs
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labs [2014/04/30 03:36] rachata |
labs [2015/04/24 19:15] onur [Lab 8: Multicore and Cache Coherence (Due: Sun. 5/3)] |
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| ====== Labs ====== | ====== Labs ====== | ||
| - | ===== Lab 1: Instruction Level ARM Simulator (Due: Fri. 1/24) ===== | + | ===== Lab 1: Instruction Level MIPS Simulator (Due: Fri. 1/23) ===== |
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| - | * {{lab1.pdf|Lab 1 Handout}} | + | * [[https://milkshark.ics.cs.cmu.edu/courses/25/assessments/11 | Autolab]] |
| - | * {{lab1.tar|Lab 1 Starter Code}} | + | * {{lab1-handout.tar}} |
| - | * {{lab1_dist.pdf|Lab 1 Grade Distribution}} | + | * {{lab1.pdf|Handout}} |
| + | * {{lab1_grade_447.pdf|Grade distribution}} | ||
| ===== Lab 1.5: SystemVerilog Warm-Up (Due: Never) ===== | ===== Lab 1.5: SystemVerilog Warm-Up (Due: Never) ===== | ||
| - | * {{lab1.5.pdf|Lab 1.5 Handout}} | + | * {{lab1.5.pdf|Lab 1.5 Handout}} |
| - | + | ||
| - | ===== Lab 2: Single Cycle ARM (Due: Fri. 2/7)===== | + | |
| - | + | ||
| - | * {{lab2.pdf|Lab 2 Handout}} | + | |
| - | * {{lab2.tar.gz|Lab 2 Starter Code}} | + | |
| - | * {{lab2_dist.pdf|Lab 2 Grade Distribution}} | + | |
| - | + | ||
| - | ===== Lab 3: Pipelining (Due: Fri. 2/21)===== | + | |
| - | + | ||
| - | * {{lab3.pdf|Lab 3 Handout}} | + | |
| - | * {{lab3_grades.pdf|Lab 3 Grade Distribution}} | + | |
| - | + | ||
| - | ===== Lab 4a: Branch Prediction (Due: Fri. 3/21)===== | + | |
| - | + | ||
| - | * {{lab4.pdf|Lab 4a Handout}} | + | |
| - | + | ||
| - | ===== Lab 4b: Fine-Grained Multithreading (Due: Fri. 3/21)===== | + | |
| - | + | ||
| - | * {{lab4b.pdf|Lab 4b Handout}} | + | |
| - | + | ||
| - | ===== Lab 5: Simulating Caches and Branch Prediction (Due: Sun. 4/6)===== | + | |
| - | * {{lab5.pdf|Lab 5 Handout}} | + | ===== Lab 2: Instruction Level MIPS Simulator (Due: Fri. 2/6) ===== |
| - | * {{lab5_starter.tar.gz|Lab 5 Starter Code}} | + | |
| - | * [[lab5_faq|Lab 5 FAQs]] | + | |
| - | ===== Lab 6: Memory Hierarchy (Due: Sun. 4/20)===== | + | * {{lab2-handout.tar}} |
| + | * {{lab2.pdf}} | ||
| + | * {{lab2_grade_dist.pdf|Grade distribution}} | ||
| + | ===== Lab 3: Pipelined MIPS (Due: Fri. 2/20) ===== | ||
| + | |||
| + | * [[https://milkshark.ics.cs.cmu.edu/courses/25/assessments/197 | Autolab]] | ||
| + | * {{lab3.pdf|Handout}} | ||
| + | * {{lab3-handout.tar}} | ||
| + | * {{lab3_grade_dist.pdf|Grade distribution}} | ||
| + | ===== Lab 4: Branch Prediction (Due: Fri. 03/06) ===== | ||
| + | |||
| + | * [[https://autolab.cs.cmu.edu/courses/25/assessments/347 | Autolab]] | ||
| + | * {{lab4.pdf|Handout}} | ||
| + | * {{lab4.tar.gz}} | ||
| + | * {{lab4_grade_dist.pdf|Grade distribution}} | ||
| + | ===== Lab 5: Data Cache (Due: Sun. 03/22) ===== | ||
| + | |||
| + | * [[https://autolab.cs.cmu.edu/courses/25/assessments/377 | Autolab]] | ||
| + | * {{lab5.pdf|Handout}} | ||
| + | * {{lab5.tar.gz}} | ||
| + | * {{lab5_dist.pdf|Grade distribution}} | ||
| + | ===== Lab 6: Simulating Caches and Branch Prediction (Due: Fri. 04/03) ===== | ||
| + | |||
| + | * [[https://autolab.cs.cmu.edu/courses/25/assessments/476 | Autolab]] | ||
| + | * {{lab6.pdf|Handout}} | ||
| + | * {{lab6.tar.gz}} | ||
| + | * {{lab6_grade_dist.pdf|Grade distribution}} | ||
| - | * {{lab6.pdf|Lab 6 Handout}} | + | ===== Lab 7: Memory Hierarchy (Due: Fri. 04/17, but can submit until 5/1) ===== |
| + | * [[https://autolab.cs.cmu.edu/courses/18447-s15/assessments/lab7 | Autolab]] | ||
| + | * {{lab7.pdf|Handout}} | ||
| - | ===== Lab 7: Multicore and Cache Coherence (Due: Fri. 5/2 (Accept late submissions until May 9))===== | + | ===== Lab 8: Multicore and Cache Coherence (Extra Credit) ===== |
| - | * {{lab7.pdf|Lab 7 Handout}} | + | * [[https://autolab.cs.cmu.edu/courses/18447-s15/assessments/lab8 | Autolab]] |
| + | * {{lab8.pdf|Handout}} | ||
| + | * {{lab8.tar.gz}} | ||
labs.txt · Last modified: 2017/09/17 00:10 by jeremie
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