homeworks
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homeworks [2014/12/11 00:21] rachata |
homeworks [2015/04/22 17:22] kevincha [Homework 6: Main Memory, Latency Tolerance, Prefetching and Runahead Execution (Due: 4/10)] |
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| - | ====== Homeworks ====== | + | ====== Homework ====== |
| - | ===== Homework 0: Student Information (Due: TBA) ===== | + | ===== Homework 0: Student Information (Due: 1/16) ===== |
| - | * HW0 Handout | + | * [[https://milkshark.ics.cs.cmu.edu/courses/25/assessments/12 | Autolab]] |
| + | * {{hw0.pdf | HW0 handout}} | ||
| - | ===== Homework 1: ISA (Due: TBA) ===== | + | ===== Homework 1: ISA (Due: 1/28) ===== |
| - | * HW1 Handout | + | * [[https://milkshark.ics.cs.cmu.edu/courses/25/assessments/37 | Autolab]] |
| - | * Solution | + | * {{hw1.pdf | HW1 handout}} |
| - | * Grade Distribution | + | * {{hw1_sol_s15.pdf | HW1 solution}} |
| + | * [[http://users.ece.cmu.edu/~kevincha/447/reviews_patt_447.txt | Good example reviews on Patt's papers]] | ||
| + | * [[http://users.ece.cmu.edu/~kevincha/447/reviews_memory_447.txt | Good example reviews on memory papers]] | ||
| + | ===== Homework 2: ISA Tradeoffs, Microprogramming and Pipelining (Due: 2/11) ===== | ||
| - | ===== Homework 2: ISA Tradeoffs, Microprogramming and Pipelining (Due: TBA) ===== | + | * [[https://milkshark.ics.cs.cmu.edu/courses/25/assessments/214 | Autolab]] |
| + | * {{microcode.csv|Microcode}} | ||
| + | * {{hw2.pdf | HW2 handout}} | ||
| + | * {{hw2_solution.pdf | HW2 solution}} | ||
| + | ===== Homework 3: Branch Prediction, Out-of-order Execution, and GPU (Due: 2/25) ===== | ||
| + | * [[https://autolab.cs.cmu.edu/courses/25/assessments/294 | Autolab]] | ||
| + | * {{hw3.pdf | HW3 handout}} | ||
| + | * {{hw3_sol_s15.pdf | HW3 solution}} | ||
| + | ===== Homework 3.1: Feedback Form (Due: 2/23) ===== | ||
| + | * {{feedback.pdf | Feedback (PDF) -- Due to bugs in Preview (Mac OSX), please use a different editor to view the form correctly.}} | ||
| - | * HW2 Handout | + | ===== Homework 4: SIMD, VLIW, Static Scheduling, Caching, Virtual Memory (Due: 3/18) ===== |
| - | * Solution | + | * [[https://autolab.cs.cmu.edu/courses/25/assessments/376|Autolab]] |
| - | * Grade Distribution | + | * {{hw4_s15.pdf | HW4 handout}} |
| + | * {{hw4_s15_sol.pdf | HW4 solution}} | ||
| - | ===== Homework 3: Branch Prediction, Out-of-order Execution (Due: TBA) ===== | + | ===== Homework 5: Virtual Memory and Main Memory (Due: 3/23) ===== |
| - | + | * [[https://autolab.cs.cmu.edu/courses/25/assessments/503|Autolab]] | |
| - | * HW3 Handout | + | * {{hw5.pdf | HW5 handout}} |
| - | * Solution | + | * {{hw5_sol.pdf | HW5 solution}} |
| - | * Grade Distribution | + | * {{hw5_dist.pdf | Grade distribution}} |
| - | + | ===== Homework 6: Main Memory, Latency Tolerance, Prefetching and Runahead Execution (Due: 4/10) ===== | |
| - | ===== Homework 4: GPU, SIMD and Caching (Due: TBA) ===== | + | * [[https://autolab.cs.cmu.edu/courses/18447-s15/assessments/hw6|Autolab]] |
| - | + | * {{hw6.pdf | HW6 handout}} | |
| - | * HW4 Handout | + | * {{hw6_sol.pdf | HW6 solution}} |
| - | * Solution | + | * {{hw6_dist.pdf | Grade distribution}} |
| - | * Grade Distribution | + | ===== Homework 7: Coherence, Consistency, Multiprocessors and Interconnect (Due: 4/29) ===== |
| - | + | * [[https://autolab.cs.cmu.edu/courses/18447-s15/assessments/hw7|Autolab]] | |
| - | ===== Homework 5: Caching and VM (reviews) (Due: TBA) ===== | + | * {{hw7.pdf | HW7 handout}} |
| - | + | ||
| - | * HW5 Handout | + | |
| - | * Grade Distribution | + | |
| - | * Solution | + | |
| - | + | ||
| - | ===== Homework 6: Main Memory (Due: TBA) ===== | + | |
| - | + | ||
| - | * HW6 Handout | + | |
| - | * Grade Distribution | + | |
| - | * Solution | + | |
| - | + | ||
| - | ===== Homework 7: Prefetching, Runahead, Cache Coherence, Multiprocessors, Faults (Due: TBA) ===== | + | |
| - | + | ||
| - | * HW7 Handout | + | |
| - | * Grade Distribution | + | |
| - | * Solution | + | |
homeworks.txt · Last modified: 2015/05/04 15:55 by jeremie
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