buzzword
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buzzword [2015/02/25 21:05] kevincha [Lecture 17 (2/25 Wed.)] |
buzzword [2015/03/04 19:21] kevincha [Lecture 19 (03/02 Mon.)] |
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| * Tradeoffs betwwen trace cache/Hyperblock/Superblock/BS-ISA | * Tradeoffs betwwen trace cache/Hyperblock/Superblock/BS-ISA | ||
| | | ||
| + | ===== Lecture 17 (2/25 Wed.) ===== | ||
| * IA-64 | * IA-64 | ||
| * EPIC | * EPIC | ||
| Line 696: | Line 696: | ||
| * Approximate LRU | * Approximate LRU | ||
| * Victim and next Victim policy | * Victim and next Victim policy | ||
| + | |||
| + | ===== Lecture 18 (2/27 Fri.) ===== | ||
| + | * Tag store and data store | ||
| + | * Cache hit rate | ||
| + | * Average memory access time (AMAT) | ||
| + | * AMAT vs. Stall time | ||
| + | * Cache basics | ||
| + | * Direct mapped vs. associative cache | ||
| + | * Set/block (line)/Placement/replacement | ||
| + | * How do tag and index get used? | ||
| + | * Full associativity | ||
| + | * Set associative cache | ||
| + | * insertion, promotion, eviction (replacement) | ||
| + | * Various replacement policies | ||
| + | * How to implement LRU | ||
| + | * How to keep track of access ordering | ||
| + | * Complexity increases rapidly | ||
| + | * Approximate LRU | ||
| + | * Victim and next Victim policy | ||
| + | * Set thrashing | ||
| + | * Working set is bigger than the associativity | ||
| + | * Belady's OPT | ||
| + | * Is this optimal? | ||
| + | * Complexity? | ||
| + | * DRAM as a cache for disk | ||
| + | * Handling writes | ||
| + | * Write through | ||
| + | * Need a modified bit to make sure accesses to data got the updated data | ||
| + | * Write back | ||
| + | * Simpler, no consistency issues | ||
| + | * Sectored cache | ||
| + | * Use subblock | ||
| + | * lower bandwidth | ||
| + | * more complex | ||
| + | * Instruction vs data cache | ||
| + | * Where to place instructions | ||
| + | * Unified vs. separated | ||
| + | * In the first level cache | ||
| + | * Cache access | ||
| + | * First level access | ||
| + | * Second level access | ||
| + | * When to start the second level access | ||
| + | * Cache performance | ||
| + | * capacity | ||
| + | * block size | ||
| + | * associativity | ||
| + | * Classification of cache misses | ||
| + | ===== Lecture 19 (03/02 Mon.) ===== | ||
| + | * Subblocks | ||
| + | * Victim cache | ||
| + | * Small, but fully assoc. cache behind the actual cache | ||
| + | * Cached misses cache block | ||
| + | * Prevent ping-ponging | ||
| + | * Pseudo associtivity | ||
| + | * Simpler way to implement associative cache | ||
| + | * Skewed assoc. cache | ||
| + | * Different hashing functions for each way | ||
| + | * Restructure data access pattern | ||
| + | * Order of loop traversal | ||
| + | * Blocking | ||
| + | * Memory level parallelism | ||
| + | * Cost per miss of a parallel cache miss is less costly compared to serial misses | ||
| + | * MSHR | ||
| + | * Keep track of pending cache | ||
| + | * Think of this as the load/store buffer-ish for cache | ||
| + | * What information goes into the MSHR? | ||
| + | * When do you access the MSHR? | ||
| + | * Memory banks | ||
| + | * Shared caches in multi-core processors | ||
| + | ===== Lecture 20 (03/04 Wed.) ===== | ||
| + | * Virtual vs. physical memory | ||
| + | * System's management on memory | ||
| + | * Benefits | ||
| + | * Problem: physical memory has limited size | ||
| + | * Mechanisms: indirection, virtual addresses, and translation | ||
| + | * Demand paging | ||
| + | * Physical memory as a cache | ||
| + | * Tasks of system SW for VM | ||
| + | * Serving a page fault | ||
| + | * Address translation | ||
| + | * Page table | ||
| + | * PTE (page table entry) | ||
| + | * Page replacement algorithm | ||
| + | * CLOCK algo. | ||
| + | * Inverted page table | ||
| + | * Page size trade-offs | ||
| + | * Protection | ||
| + | * Multi-level page tables | ||
| + | * x86 implementation of page table | ||
| + | * TLB | ||
| + | * Handling misses | ||
| + | * When to do address translation? | ||
| + | * Homonym and Synonyms | ||
| + | * Homonym: Same VA but maps to different PA with multiple processes | ||
| + | * Synonyms: Multiple VAs map to the same PA | ||
| + | * Shared libraries, shared data, copy-on-write | ||
| + | * Virtually indexed vs. physically indexed | ||
| + | * Virtually tagged vs. physically tagged | ||
| + | * Virtually indexed physically tagged | ||
| + | * Can these create problems when we have the cache | ||
| + | * How to eliminate these problems? | ||
| + | * Page coloring | ||
| + | * Interaction between cache and TLB | ||
buzzword.txt · Last modified: 2015/04/27 18:20 by rachata
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