buzzword
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buzzword [2015/01/26 19:20] rachata |
buzzword [2015/02/02 19:23] rachata |
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| * Fixed vs. variable length instruction | * Fixed vs. variable length instruction | ||
| + | * Huffman encoding | ||
| * Uniform vs. non-uniform decode | * Uniform vs. non-uniform decode | ||
| * Registers | * Registers | ||
| Line 205: | Line 206: | ||
| * Dynamic power/Static power | * Dynamic power/Static power | ||
| * Increases in power due to frequency | * Increases in power due to frequency | ||
| + | |||
| + | ===== Lecture 6 (1/28 Mon.) ===== | ||
| + | |||
| + | * Design principles | ||
| + | * Common case design | ||
| + | * Critical path design | ||
| + | * Balanced designs | ||
| + | * Multi cycle design | ||
| + | * Microcoded/Microprogrammed machines | ||
| + | * States | ||
| + | * Translation from one state to another | ||
| + | * Microinstructions | ||
| + | * Microsequencing | ||
| + | * Control store - Product control signals | ||
| + | * Microsequencer | ||
| + | * Control signal | ||
| + | * What do they have to control? | ||
| + | * Instruction processing cycle | ||
| + | * Latch signals | ||
| + | * State machine | ||
| + | * State variables | ||
| + | * Condition code | ||
| + | * Steering bits | ||
| + | * Branch enable logic | ||
| + | * Difference between gating and loading? (write enable vs. driving the bus) | ||
| + | * Memory mapped I/O | ||
| + | * Hardwired logic | ||
| + | * What control signals come from hardwired logic? | ||
| + | * Variable latency memory | ||
| + | * Handling interrupts | ||
| + | * Difference betwen interrupts and exceptions | ||
| + | * Emulator (i.e. uCode allots minimal datapath to emulate the ISA) | ||
| + | * Updating machine behavior | ||
| + | * Horizontal microcode | ||
| + | * Vertical microcode | ||
| + | * Primitives | ||
| + | | ||
| + | ===== Lecture 7 (1/30 Fri.) ===== | ||
| + | |||
| + | * Emulator (i.e. uCode allots minimal datapath to emulate the ISA) | ||
| + | * Updating machine behavior | ||
| + | * Horizontal microcode | ||
| + | * Vertical microcode | ||
| + | * Primitives | ||
| + | * nanocode and millicode | ||
| + | * what are the differences between nano/milli/microcode | ||
| + | * microprogrammed vs. hardwire control | ||
| + | * Pipelining | ||
| + | * Limitations of the multi-programmed design | ||
| + | * Idle resources | ||
| + | * Throughput of a pipelined design | ||
| + | * What dictacts the throughput of a pipelined design? | ||
| + | * Latency of the pipelined design | ||
| + | * Dependency | ||
| + | * Overhead of pipelining | ||
| + | * Latch cost? | ||
| + | * Data forwarding/bypassing | ||
| + | * What are the ideal pipeline? | ||
| + | * External fragmentation | ||
| + | * Issues in pipeline designs | ||
| + | * Stalling | ||
| + | * Dependency (Hazard) | ||
| + | * Flow dependence | ||
| + | * Output dependence | ||
| + | * Anti dependence | ||
| + | * How to handle them? | ||
| + | * Resource contention | ||
| + | * Keeping the pipeline full | ||
| + | * Handling exception/interrupts | ||
| + | * Pipeline flush | ||
| + | * Speculation | ||
| + | |||
| + | | ||
| + | | ||
| + | ===== Lecture 8 (2/2 Mon.) ===== | ||
| + | |||
| + | * Interlocking | ||
| + | * Multipath execution | ||
| + | * Fine grain multithreading | ||
| + | * No-op (Bubbles in the pipeline) | ||
| + | * Valid bits in the instructions | ||
| + | * Branch prediction | ||
| + | * Different types of data dependence | ||
| + | * Pipeline stalls | ||
| + | * bubbles | ||
| + | * How to handle stalls | ||
| + | * Stall conditions | ||
| + | * Stall signals | ||
| + | * Dependences | ||
| + | * Distant between dependences | ||
| + | * Data forwarding/bypassing | ||
| + | * Maintaining the correct dataflow | ||
| + | * Different ways to design data forwarding path/logic | ||
| + | * Different techniques to handle interlockings | ||
| + | * SW based | ||
| + | * HW based | ||
| + | * Profiling | ||
| + | * Static profiling | ||
| + | * Helps from the software (compiler) | ||
| + | * Superblock optimization | ||
| + | * Analyzing basic blocks | ||
| + | * How to deal with branches? | ||
| + | * Branch prediction | ||
| + | * Delayed branching (branch delay slot) | ||
| + | * Forward control flow/backward control flow | ||
| + | * Branch prediction accuracy | ||
| + | * Profile guided code positioning | ||
| + | * Based on the profile info. position the code based on it | ||
| + | * Try to make the next sequential instruction be the next inst. to be executed | ||
| + | * Predicate combining (combine predicate for a branch instruction) | ||
| + | * Predicated execution (control dependence becomes data dependence) | ||
| + | | ||
| | | ||
buzzword.txt · Last modified: 2015/04/27 18:20 by rachata
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