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buzzword [2015/01/16 19:44] kevincha |
buzzword [2015/01/21 23:02] rachata |
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===== Lecture 3 (1/17 Fri.) ===== | ===== Lecture 3 (1/17 Fri.) ===== | ||
- | * Microarchitecture | + | * Microarchitecture |
+ | * Three major tradeoffs of computer architecture | ||
+ | * Macro-architecture | ||
+ | * LC-3b ISA | ||
+ | * Unused instructions | ||
+ | * Bit steering | ||
+ | * Instruction processing style | ||
+ | * 0,1,2,3 address machines | ||
+ | * Stack machine | ||
+ | * Accumulator machine | ||
+ | * 2-operand machine | ||
+ | * 3-operand machine | ||
+ | * Tradeoffs between 0,1,2,3 address machines | ||
+ | * Postfix notation | ||
+ | * Instructions/Opcode/Operade specifiers (i.e. addressing modes) | ||
+ | * Simply vs. complex data type (and their tradeoffs) | ||
+ | * Semantic gap and level | ||
+ | * Translation layer | ||
+ | * Addressability | ||
+ | * Byte/bit addressable machines | ||
+ | * Virtual memory | ||
+ | * Big/little endian | ||
+ | * Benefits of having registers (data locality) | ||
+ | * Programmer visible (Architectural) state | ||
+ | * Programmers can access this directly | ||
+ | * What are the benefits? | ||
+ | * Microarchitectural state | ||
+ | * Programmers cannot access this directly | ||
+ | * Evolution of registers (from accumulators to registers) | ||
+ | * Different types of instructions | ||
+ | * Control instructions | ||
+ | * Data instructions | ||
+ | * Operation instructions | ||
+ | * Addressing modes | ||
+ | * Tradeoffs (complexity, flexibility, etc.) | ||
+ | * Orthogonal ISA | ||
+ | * Addressing modes that are orthogonal to instruction types | ||
+ | * I/O devices | ||
+ | * Vectored vs. non-vectored interrupts | ||
+ | * Complex vs. simple instructions | ||
+ | * Tradeoffs | ||
+ | * RISC vs. CISC | ||
+ | * Tradeoff | ||
+ | * Backward compatibility | ||
+ | * Performance | ||
+ | * Optimization opportunity | ||
+ | * Translation | ||
- | * Three major tradeoffs of computer architecture | + | ===== Lecture 4 (1/21 Wed.) ===== |
- | * Macro-architecture | + | * Fixed vs. variable length instruction |
+ | * Uniform vs. non-uniform decode | ||
+ | * Registers | ||
+ | * Tradeoffs between number of registers | ||
+ | * Alignments | ||
+ | * How does MIPS load words across alignment the boundary | ||
- | * LC-3b ISA | ||
- | * Unused instructions | ||
- | |||
- | * Bit steering | ||
- | |||
- | * Instruction processing style | ||
- | |||
- | * 0,1,2,3 address machines | ||
- | |||
- | * Stack machine | ||
- | |||
- | * Accumulator machine | ||
- | |||
- | * 2-operand machine | ||
- | |||
- | * 3-operand machine | ||
- | |||
- | * Tradeoffs between 0,1,2,3 address machines | ||
- | |||
- | * Postfix notation | ||
- | |||
- | * Instructions/Opcode/Operade specifiers (i.e. addressing modes) | ||
- | |||
- | * Simply vs. complex data type (and their tradeoffs) | ||
- | |||
- | * Semantic gap and level | ||
- | |||
- | * Translation layer | ||
- | |||
- | * Addressability | ||
- | |||
- | * Byte/bit addressable machines | ||
- | |||
- | * Virtual memory | ||
- | |||
- | * Big/little endian | ||
- | |||
- | * Benefits of having registers (data locality) | ||
- | |||
- | * Programmer visible (Architectural) state | ||
- | |||
- | * Programmers can access this directly | ||
- | |||
- | * What are the benefits? | ||
- | |||
- | * Microarchitectural state | ||
- | |||
- | * Programmers cannot access this directly | ||
- | |||
- | * Evolution of registers (from accumulators to registers) | ||
- | |||
- | * Different types of instructions | ||
- | |||
- | * Control instructions | ||
- | |||
- | * Data instructions | ||
- | |||
- | * Operation instructions | ||
- | |||
- | * Addressing modes | ||
- | |||
- | * Tradeoffs (complexity, flexibility, etc.) | ||
- | |||
- | * Orthogonal ISA | ||
- | |||
- | * Addressing modes that are orthogonal to instruction types | ||
- | |||
- | * I/O devices | ||
- | |||
- | * Vectored vs. non-vectored interrupts | ||
- | |||
- | * Complex vs. simple instructions | ||
- | |||
- | * Tradeoffs | ||
- | |||
- | * RISC vs. CISC | ||
- | |||
- | * Tradeoff | ||
- | |||
- | * Backward compatibility | ||
- | |||
- | * Performance | ||
- | |||
- | * Optimization opportunity | ||
- | |||
- | * Translation |