buzzword
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buzzword [2014/01/24 19:10] rachata |
buzzword [2014/01/27 19:20] rachata |
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| * Balanced designs | * Balanced designs | ||
| * Multi cycle design | * Multi cycle design | ||
| + | |||
| + | ===== Lecture 6 (1/27 Mon.) ===== | ||
| + | |||
| + | * Microcoded/Microprogrammed machines | ||
| + | * States | ||
| + | * Microinstructions | ||
| + | * Microsequencing | ||
| + | * Control store - Product control signals | ||
| + | * Microsequencer | ||
| + | * Control signal | ||
| + | * What do they have to control? | ||
| + | * Instruction processing cycle | ||
| + | * Latch signals | ||
| + | * State machine | ||
| + | * State variables | ||
| + | * Condition code | ||
| + | * Steering bits | ||
| + | * Branch enable logic | ||
| + | * Difference between gating and loading? (write enable vs. driving the bus) | ||
| + | * Memory mapped I/O | ||
| + | * Hardwired logic | ||
| + | * What control signals come from hardwired logic? | ||
| + | * Variable latency memory | ||
| + | * Handling interrupts | ||
| + | * Difference betwen interrupts and exceptions | ||
| + | * Emulator (i.e. uCode allots minimal datapath to emulate the ISA) | ||
| + | * Updating machine behavior | ||
| + | * Horizontal microcode | ||
| + | * Vertical microcode | ||
| + | * Primitives | ||
buzzword.txt · Last modified: 2015/04/27 18:20 by rachata
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