buzzword
Differences
This shows you the differences between two versions of the page.
| Both sides previous revision Previous revision | Next revision Both sides next revision | ||
|
buzzword [2014/01/17 19:20] rachata |
buzzword [2014/01/22 19:23] rachata |
||
|---|---|---|---|
| Line 164: | Line 164: | ||
| * Optimization opportunity | * Optimization opportunity | ||
| + | ===== Lecture 4 (1/22 Wed.) ===== | ||
| + | |||
| + | * Semantic gap | ||
| + | * Small vs. Large semantic gap (CISC vs. RISC) | ||
| + | * Benefit of RISC vs. CISC | ||
| + | * Micro operations/microcode | ||
| + | * Translate complex instructions into smaller instructions | ||
| + | * Parallelism (motivation for RISC) | ||
| + | * Compiler optimization | ||
| + | * Code optimization through translation | ||
| + | * VLIW | ||
| + | * Fixed vs. variable length instructions | ||
| + | * Tradeoffs | ||
| + | * Alignment issues? (fetch/decode) | ||
| + | * Decoding issues? | ||
| + | * Code size? | ||
| + | * Adding additional instructions? | ||
| + | * Memory bandwidth and cache utilization? | ||
| + | * Energy? | ||
| + | * Encoding in variable length instructions | ||
| + | * Structure of Alpha instructions and other uniform decode instructions | ||
| + | * Different type of instructions | ||
| + | * Benefit of knowing what type of instructions | ||
| + | * Speculatively operate future instructions | ||
| + | * x86 and other non-uniform decode instructions | ||
| + | * Tradeoff vs. uniform decode | ||
| + | * Tradeoffs for different number of registers | ||
| + | * Spilling into memory if the number of registers is small | ||
| + | * Compiler optimization on how to manage which value to keep/spill | ||
| + | * Addressing modes | ||
| + | * Benefits? | ||
| + | * Types? | ||
| + | * Different uses of addressing modes? | ||
| + | * Various ISA-level tradeoffs | ||
| + | * Virtual memory | ||
| + | * Unalign memory access/aligned memory access | ||
| + | * Cost vs. benefit of unaligned access | ||
| + | * ISA specification | ||
| + | * Things you have to obey/specifie in the ISA specification | ||
| + | * Architectural states | ||
| + | * Microarchitecture implements how arch. state A transformed to the next arch. state A' | ||
| + | * Single cycle machines | ||
| + | * Critical path in the single cycle machine | ||
| + | * Multi cycle machines | ||
| + | * Functional units | ||
| + | * Performance metrics | ||
| + | * CPI/IPC | ||
| + | * CPI of a single cycle microarchitecture | ||
buzzword.txt · Last modified: 2015/04/27 18:20 by rachata
Page Tools
Except where otherwise noted, content on this wiki is licensed under the following license: CC Attribution-Share Alike 3.0 Unported
