This week, we built towards a basic prototype that interfaces with the FPGA for accelerated inference.
My personal goals were to get used to dealing with a Pynq based interface and identify how I could use it to do the following:
- Raise an “in use” flag, this would be used by the client to decide whether to send query.
- Directly wire the input to the output(basically send the query back to the user).
The objective of this system is to prime towards a multi-client based FPGA response system as described in our team report and design reports.
For the time being, the above goals seem to be accomplished but we can’t really verify it until the complete system integration is done over the following week. But given that the blocks are relatively simple and have been tested well internally we seem to be ahead of schedule on our project.