- Debugged Tetris and Dr. Mario based on the frames (see Katherine/Bharathi’s status reports for more detail)
- Created frame buffer from BRAMs and used it to render vga frame (preinitialized with our tetris.ppm frame). Also upscaled it to support a larger display.
- Rendered dmg-acid-test with pure ROM, incorrect but not far off so we proceeded to start debugging entire design on FPGA.
- Wrote the APU (4 channels with envelope/sweep/volume/pseudorandom noise manipulation). Unsure if we will get to implement this.
- Did some research on the side and came up with a plan to use SDRAM and UART through raspberry pi to support MBC for games that have more memory than FPGA block rams can support (but it seems like we will not have time to do this)
- Currently debugging Dr. Mario ROM on fpga + vga setup. Using signal tap and slower clocks to step though the PCs and cross-comparing between simulation and synthesis to check.
Some images throughout the week of the process (signal tap + vga/frame buffer timing bugs):
