Bharathi’s Status Report for 3/29/25

 

My goal(s) for this week were some subset of:

  • DMG PPU integration (in progress, to be continued).
  • APU test on FPGA (postponed to next week).

Accomplished

DMG PPU (4-color PPU)

PPU integration is in progress. 

 

Integration & debugging in progress
After fixing Scrolling (SCX, SCY) and LCDC related bugs
DMG Acid Test — Reference Image

CGB PPU (full-color PPU)

No updates here.

APU / CODEC Research

Postponed work on APU in favor of getting the PPU integrated and preparing for the demo.

Summary of time spent this week

  • PPU & integration debugging: 12+ hrs

Schedule / Progress

I believe I’m on schedule. Integration is in progress. PPU and MMU are fully integrated, and our test to render a single frame was successful. CPU, MMU, PPU all seem to be talking well but there’s still a lot of integration debugging left.

Next Step(s)

  • More integration debugging.
  • Demo prep.
  • APU test on FPGA.

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