Ruslana’s Status Report for 3/22/25

Timer/PPU/APU IO Registers work, in addition to BRAM modules in MMU!
Currently (in between typing this report) debugging DMA functionality–MMU is almost completely testbenched enough for integration to be full sent
First integration test between CPU/MMU has been written and compiled with a fresh Makefile and a basic tb has been created, and debugging more thoroughly is scheduled for tomorrow