My goal(s) for this week were some subset of:

• Validate full WM8731 configuration (postponed to next week).
• Sketch I2S implementation (completed).
• DMG PPU integration (postponed to next week).
• CGB PPU debugging — target: get backgrounds and windows working (completed).

Accomplished

DMG PPU (4-color PPU)

No updates here, I plan to integrate this with the CPU & MMU early next week. 

CGB PPU (full-color PPU)

Backgrounds seem to be mostly functional, but I’m still debugging issues with the sprite palettes.

APU / CODEC Research

Implemented I2S logic — works in simulation.

Sketched datapath for APU + wrote some RTL. Will do a code review for this with Ruslana next week and try a basic test on FPGA.

Summary of time spent this week

• CGB debugging: 9+ hrs
• I2S implementation: 2 hrs
• APU research + datapath + RTL: 4 hrs

Schedule / Progress

I believe I’m on schedule.  I don’t have any new concerns about the PPU or APU largely, but I should really integrate the PPU next week so I can debug some larger tests.

Next Step(s)

• DMG PPU integration.
• APU test on FPGA.