This past week, I worked on the microSD card implementation. I tried to test our microSD card reader with a multimeter to see what its idle voltage was (3.3V or 5V) but after doing some more research, I realized that the microSD card must be inserted in order to activate pull up resistors in the reader. So, while we waited for the microSD card to arrive, I started on the RTL of the microSD card reader, which is SPI protocol. I found a resource from MIT that implemented SPI microSD card protocol in Verilog, but it was dated for the modern microSD cards we were using. With this reference on SPI commands sent for microSD, I added additional steps in the protocol to make it compatible with our new cards. Additionally, I found a different microSD card reader that is made to operate on 3.3V and SPI mode, which would eliminate any concerns about if the reader’s I/O would need to be bumped up to 5V or down to 3.3V to interface with the FPGA. This has more pins (12 vs 6) but some of them can be tied to ground, so it is not too much of a difference.
This week, I will simulate the RTL with data that reflects how we will store the rotor encodings. Also, when the microSD cards arrive, I will see if our current microSD card reader works, and if so, I will hopefully try to synthesize with the FPGA I/O pins. Tomorrow, Tanisha and I will work on PCB routing together. Overall, we are on track and making good progress on both the embedded and RTL side.