Although I planned to have already finished the remainder of edits to our CPU pipeline diagram, altsyncram megafunction parameters, and AXI clarification, these tasks are ongoing, and I plan to complete them by tomorrow evening.\u00a0 I developed the early drafts of our high-level system block diagram (to be presented during the design review), which required me to study Jae’s work on the PCB, microcontroller, and serial communication fronts.\u00a0 Along the way, Jae and I clarified design details regarding I2C communication between the ESP32 microcontroller, the DSKY PCB, and our AGC assembly programs.\u00a0 We don’t plan to implement interrupt capabilities in our microarchitecture, so we need to write a main program that effectively polls inputs and regularly updates the display when necessary.<\/p>\n","protected":false},"excerpt":{"rendered":"
Although I planned to have already finished the remainder of edits to our CPU pipeline diagram, altsyncram megafunction parameters, and AXI clarification, these tasks are ongoing, and I plan to complete them by tomorrow evening.\u00a0 I developed the early drafts of our high-level system block diagram (to be presented during the design review), which required … <\/p>\n