{"id":68,"date":"2021-02-27T21:40:23","date_gmt":"2021-02-28T02:40:23","guid":{"rendered":"http:\/\/course.ece.cmu.edu\/~ece500\/projects\/s21-teamc1\/?p=68"},"modified":"2021-02-27T21:40:23","modified_gmt":"2021-02-28T02:40:23","slug":"andys-status-report-for-02-27-21-2","status":"publish","type":"post","link":"http:\/\/course.ece.cmu.edu\/~ece500\/projects\/s21-teamc1\/2021\/02\/27\/andys-status-report-for-02-27-21-2\/","title":{"rendered":"Andy&#8217;s Status Report for 02\/27\/21"},"content":{"rendered":"<p>This week, aside from helping with the presentation and discussing the overall plan with Joseph, I worked on research for the Audio, Input, Software, and Communication systems. I&#8217;ve attached a copy of my notes.<\/p>\n<p>Suffice it to say, the current plan for audio is to have a single channel of 8-bit PCM audio and 32KHz, which will be representative of the GBA in sound power. Note that our users will be able to produce better sound, as they aren&#8217;t bound to a 16MB cartridge, though. Audio will be output by sending samples supplied by the CPU over I2S to the HDMI output. The interface itself hasn&#8217;t been designed yet, as I&#8217;m not sold on how it should be done specifically, so I&#8217;m a touch behind. I plan to get that done as soon as possible, and I&#8217;m confident I can be back on track by the end of next week.<\/p>\n<p>For input, we plan to use a SNES controller over GPIO. I go over the details of the SNES controller communication protocol in my notes. It&#8217;s a simple protocol thats clocked well below what our FPGA will be clocked at. It should be relatively simple to bring up, as long as we can find controller ports.<\/p>\n<p>For software, I took another look at the C standard and realized that our requirement of providing it to the user is completely infeasible if we are also creating our own kernel. The C standard has a lot to say about what an OS should provide, and we won&#8217;t be providing much of it. I&#8217;ve narrowed it down to a useful subset, which is listed in my notes.<\/p>\n<p>For communication, I spent way too much time trying to understand how the FPGA and HPS communicate with each other. From what I can gather, the last GB of the HPS&#8217; address space is mapped to the HPS-to-FPGA AXI bridge, and reading from\/writing to it will send a signal to the FPGA that it can interpret and respond to. I think I&#8217;ll have to run some experiments when I get my board to convince myself of this. I&#8217;ll also need to spend some more time with the Cyclone V manual, it seems.<\/p>\n<p>Finally, I also wrote a small C program to convert 16-bit 32KHz Mono Microsoft PCM Wave audio to pure 8-bit samples. It works with all the wave files I&#8217;ve exported from audacity into this format, though I didn&#8217;t rigorously test it. I did this so that once the audio system is brought up, we have working audio to make a direct comparison against. The program will also output 8-bit wave form audio in the wave format, so that it can be played on a computer and compared to our FPGA&#8217;s output. The source code for the program has been attached as well, though I&#8217;ve not tried building it on Windows\/Mac.<\/p>\n<p><a href=\"https:\/\/drive.google.com\/file\/d\/1iMhh_IfK8PUeajUVHhDlPFEdj5_jnqlb\/view?usp=sharing\">Program source<\/a><\/p>\n<p><a href=\"http:\/\/course.ece.cmu.edu\/~ece500\/projects\/s21-teamc1\/wp-content\/uploads\/sites\/133\/2021\/02\/Design-Notes.pdf\">Design Notes<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"<p>This week, aside from helping with the presentation and discussing the overall plan with Joseph, I worked on research for the Audio, Input, Software, and Communication systems. I&#8217;ve attached a copy of my notes. Suffice it to say, the current plan for audio is to have a single channel of 8-bit PCM audio and 32KHz, &hellip; <\/p>\n<p class=\"link-more\"><a href=\"http:\/\/course.ece.cmu.edu\/~ece500\/projects\/s21-teamc1\/2021\/02\/27\/andys-status-report-for-02-27-21-2\/\" class=\"more-link\">Continue reading<span class=\"screen-reader-text\"> &#8220;Andy&#8217;s Status Report for 02\/27\/21&#8221;<\/span><\/a><\/p>\n","protected":false},"author":411,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":[],"categories":[3],"tags":[4],"_links":{"self":[{"href":"http:\/\/course.ece.cmu.edu\/~ece500\/projects\/s21-teamc1\/wp-json\/wp\/v2\/posts\/68"}],"collection":[{"href":"http:\/\/course.ece.cmu.edu\/~ece500\/projects\/s21-teamc1\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"http:\/\/course.ece.cmu.edu\/~ece500\/projects\/s21-teamc1\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"http:\/\/course.ece.cmu.edu\/~ece500\/projects\/s21-teamc1\/wp-json\/wp\/v2\/users\/411"}],"replies":[{"embeddable":true,"href":"http:\/\/course.ece.cmu.edu\/~ece500\/projects\/s21-teamc1\/wp-json\/wp\/v2\/comments?post=68"}],"version-history":[{"count":1,"href":"http:\/\/course.ece.cmu.edu\/~ece500\/projects\/s21-teamc1\/wp-json\/wp\/v2\/posts\/68\/revisions"}],"predecessor-version":[{"id":69,"href":"http:\/\/course.ece.cmu.edu\/~ece500\/projects\/s21-teamc1\/wp-json\/wp\/v2\/posts\/68\/revisions\/69"}],"wp:attachment":[{"href":"http:\/\/course.ece.cmu.edu\/~ece500\/projects\/s21-teamc1\/wp-json\/wp\/v2\/media?parent=68"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"http:\/\/course.ece.cmu.edu\/~ece500\/projects\/s21-teamc1\/wp-json\/wp\/v2\/categories?post=68"},{"taxonomy":"post_tag","embeddable":true,"href":"http:\/\/course.ece.cmu.edu\/~ece500\/projects\/s21-teamc1\/wp-json\/wp\/v2\/tags?post=68"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}