Risks<\/b><\/p>\n
The pcb supplier we wanted to use has extended their turn-around time from 3 days to 15days in response to Coronavirus.\u00a0 This will affect our schedule and now we want to order the pcb\u2019s asap in case this time extends again.<\/span><\/p>\n Changes<\/b><\/p>\n Interpreter: The preexisting spec has been changed to include support for nested expressions, typechecking and error handling.<\/span><\/p>\n Firmware:\u00a0<\/span>Removing the boot state of neighboring tiles and changing the communication protocol to not need a clock signal.<\/span><\/p>\n Circuit:\u00a0<\/span>Removing the backup battery from the circuit.\u00a0 Also discovered that we can reliably communicate without a dedicated clock signal. So that has also been removed from the circuit.<\/span><\/p>\n Schedule<\/b><\/p>\n We are slightly behind because we changed our inter-tile communication protocol and changed certain parts of our language syntax.<\/span><\/p>\n","protected":false},"excerpt":{"rendered":" Risks The pcb supplier we wanted to use has extended their turn-around time from 3 days to 15days in response to Coronavirus.\u00a0 This will affect our schedule and now we want to order the pcb\u2019s asap in case this time extends again. Changes Interpreter: The preexisting spec has been changed to include support for nested expressions, typechecking and error handling. Firmware:\u00a0Removing the boot state of neighboring tiles and changing the communication protocol to not need a clock signal. Circuit:\u00a0Removing the…<\/p>\n