Posted on

Team Status Report for 12/06

Integration of entire system introduced hardware bugs that were worked through, currently working through software to retrieve depth imaging.

Unit tests were conducted on the 3 PCB modules separately before putting them all together, utilizing EE tools to help debug signals and identify electrical contact issues.

Overall system tests were done to determine depth, modulation offsets using a scope between all of the modules, FPS, and range. Initial tests indicate >10 fps, and linear increase in pixel values based on depth.  No major design changes were needed after test completion.

Posted on

Claire’s Status Report for 12/06

Updated pre-demo introduction, assembled rev 2 of our power supply board, debugged with teammates hardware issues integrating overall system, see team report.

Aim to help wrap up software issues in time for final demo.

Posted on

Team Status Report for 11/22

Preparations for final presentation, validating stability of modulation circuit with high side LED voltage switching cleanly, designed and ordered 2nd iteration of our smaller power board to easily perform the power up sequence necessary for the EPC600 on interface board (currently done in a tedious manner manually), DCMI alive and able to send data, much of firmware progressed this week. We are much closer to integration of our different components, and close to ready on getting system-level testing done. We have included a photo here of digital signal waveforms that show the data coming back from our image sensors.

Throughout this process, we have learned a lot about both mechanical/electrical integration, firmware nuances, and system-level design. We had to learn how to manage tradeoffs in size and power, serviceability and compactness. We also had to learn a lot more debugging skills for both hardware and software, from new types of breakpoints to PCB X-rays. We also had to do thorough design reviews and learn about the process of analog design, as well as heavy circuit theory for simulation. A lot of this knowledge came from consulting friends/colleagues who are very experienced in these areas, as we had TartanAUV alumni helping in the debugging process and design reviewing our boards.

Posted on

Claire’s Status Report for 11/22

Started putting together final presentation slides and updating diagrams.

Currently on schedule, will be working on testing and validation for the final presentation due.

Reading through data sheets was necessary to gather parameters for power consumption and current draw of parts, with recommended layout guidelines. Searching up examples from other schematics and common practices for layout was a method I used to learn.

Watching YouTube videos helped me to understand how to operate some EE tools for debugging that I haven’t used before, like the X-ray.

Posted on

Team Status Report for 11/15

Fixed ethernet issues and now pings successfully to interface PCB. 1 of 2 illumination PCBs brought up (was delayed due to parts shipment delays) as seen in image below. Presented our work in integrating these submodules during both Monday and Wednesday interim demos.

On schedule, we aim to have the EPC660 imaging chip able to receive signals and bring up the second illumination PCB to test modulation between the two systems during this next week.

illumination of green light

successful pings between interface pcb and ethernet

discovering the issue with ethernet connection using xray

 

We also have system-level validation tests planned out for the next few weeks once the individual subsystems work well.

  • Communications test: Verify that the signal chain from the image sensor all the way back to the ethernet peripheral works with <1 frame drop every minute. We will simply measure the total amount of frames and plot that versus time.
  • Range test: Verify that we are able to identify a small object at 5 m of range. We define “identify” as a visually noticeable gradient in pixel shading that changes with distance. We plan on using small blocks and other objects of different shapes to fully validate this.
  • Water test: Finally, we hope to put the entire enclosure underwater to verify that a) no water enters the enclosure and b) the depth maps are able to be generated of differing maps underwater. We hope to use the new RIC facility at Hazelwood Green that TartanAUV has access to for water verification.
Posted on

Claire’s Status Report for 11/15

Updated Gantt charts to reflect past schedule changes due to parts shipment delays and extra time needed to layout PCBs.

Presented team demos this week, next week I aim to work together on getting the EPC660 imaging chip to receive data.

We are currently on schedule!

To verify that the power consumption is met, calculations were made drawn from data sheets for most power hungry components on the interface PCB. This ensures that there is enough current from the power supplies and verifies the trace widths necessary for various signals. When this was reflowed, basic EE lab tools were utilized to check for clock signal modulation, power supply voltages, and continuity tests.

Posted on

Team Status Report for 11/8

Brought up interface pcb and power pcb, debugged through issues with some circuitry that was fixable with bodging. We are able to power the boards with no issues and flash code onto the STM32 MCU on the interface PCB.

We are on schedule, working towards the interim demo to develop firmware to get clock modulation signals working in addition to ethernet connection. Due to components shipment delay, we are focusing on getting the interface pcb subsystem working before starting on the LED driver pcbs.

Posted on

Claire’s Status Report for 11/8

Helped bring up interface pcb and debugging circuit issues. I was at a conference in Chicago so I was absent for initial unpacking and reflowing of parts.

We’re in our integration phase so most progress are made together, see team report.

We are on schedule, currently preparing for our interim demo days to show off as much as we can. Goal is to have the interface pcb be able to send data through ethernet and to the led driver pcb.

Posted on

Team Status Report for 11/1

Talked through ethics assignment before class and put together additional insights from class discussions and lecture. Ordered PCBs and parts needed, working through JLC issues. Discussed firmware and talked about integrating subsystems together. We also started planning for priorities when parts arrive and what to present for our interim demo.

Posted on

Claire’s Status Report for 11/1

Put together BOMs for PCBs, updating manufacturer part numbers.

Met with team to complete ethics assignment and discussed through potential misuse of our product. Planning for what to present on demo day and what we can feasibly get done to show off while waiting for orders to arrive.

Next week we will reflow the boards and flash code initial code to work through integration of our subsystems. On schedule!