Updated Gantt charts to reflect past schedule changes due to parts shipment delays and extra time needed to layout PCBs.
Presented team demos this week, next week I aim to work together on getting the EPC660 imaging chip to receive data.
We are currently on schedule!
To verify that the power consumption is met, calculations were made drawn from data sheets for most power hungry components on the interface PCB. This ensures that there is enough current from the power supplies and verifies the trace widths necessary for various signals. When this was reflowed, basic EE lab tools were utilized to check for clock signal modulation, power supply voltages, and continuity tests.