Gleb’s Status Report for 9/27/2025

  • Primarily busy with clock architecture + design presentation
    • We need to supply synchronized clocks to the EPC660 sensor IC and the LED driver. The clocks should be synchronized, with the sensor clock being double the frequency of the modulation clock. Furthermore, the phase delay should be adjustable to enable to allow us to run the sensor in the imaging mode, and to allow us to compensate signal propagation delay between boards.
    • I have explored different discrete clock generation solutions, while Sid has looked into clock generation on STM32 directly. For instance, I have looked into using an external PLL chip or a flipflop frequency divider. Additionally, I have explored adding a quadrature signal and using VGAs to enable the phase shifting.
    • Our final solution  is using Si5338 four-channel clock generation IC. It supports both single-ended and LVDS signalling, which is convenient for using it with EPC660 as well as the modulation driver. The frequency and phase delays will be configured from the MCU via I2C.
  • I have also imported LED and driver models into PSPICE.
  • I will be running simulations and designing the LED PCB next week.

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