Team Status Report for October 25, 2025
What are the most significant risks that could jeopardize the success of the project? How are these risks being managed? What contingency plans are ready?
The most significant risk this week was the unexpected unavailability of the TUSB1064 USB redriver IC, which went out of stock before our order could be fulfilled. We managed this by immediately evaluating alternative components, redesigning the affected PCB sections, and placing a new expedited fabrication order (7-day turnaround). This minimizes schedule impact while maintaining our signal integrity requirements.
Software development is now behind schedule, which creates risk for integration when hardware arrives. Apollo is behind on implementing the recovery algorithms and data capture framework. To address this, Mars will step in to assist with software development during the hardware fabrication period. We’re focusing efforts on core recovery functionality rather than auxiliary features, and leveraging the one-week hardware delay as additional development time. Our contingency plan is to implement a simplified recovery mode that performs raw sector imaging first, deferring complex file system reconstruction if necessary.
Hardware integration risk remains centered on verifying that the VBUS power-cycling circuit meets specifications with actual failed USB drives. Mars has prepared validation procedures and identified tunable parameters that can be adjusted if needed.
Component lead times present reduced risk since standard parts have arrived and been inventoried. Remaining long-lead items (MOSFETs and replacement redriver) are expected within 2 weeks, aligning with our revised PCB delivery schedule.
Were any changes made to the existing design of the system (requirements, block diagram, system spec, etc)? Why was this change necessary, what costs does the change incur, and how will these costs be mitigated going forward?
We made one significant hardware change: replacing the TUSB1064 USB redriver IC with an alternative component due to supply chain unavailability. Waiting for restocking (potentially 8+ weeks) would have caused unacceptable delays.
Costs include approximately one week schedule delay (PCB delivery now November 14th instead of November 7th), additional fabrication charges, and 8 hours of engineering time for redesign. We’re mitigating through expedited fabrication, using the delay for software catch-up, and streamlined bring-up procedures.
No fundamental architecture changes were made. The three-subsystem design and layered software architecture remain unchanged.
Provide an updated schedule if changes have occurred.
Revised schedule accounting for hardware delay and software development challenges:
Weeks 5-6 (current): Board redesign completed, new PCB fabrication in progress, software prototype demonstrated but core recovery algorithms behind schedule
Weeks 7-8 (upcoming): PCB delivery November 14th, board assembly and bring-up, signal integrity validation. Mars and Apollo both working on software to catch up on recovery functionality.
Weeks 9-10: System integration, initial recovery testing with failed drives, throughput optimization
Week 11: Cross-vendor compatibility validation, performance measurements, success rate analysis
Week 12: Final demonstration preparation, documentation, demo video, poster
The critical path now includes software development completion as a blocking item. Mars will assist with software during fabrication to get back on schedule.
Progress summary and demonstrations
Hardware Progress: Mars managed the component crisis by redesigning the board with a replacement redriver IC and placing an expedited fabrication order. Standard components arrived and were inventoried with 100% BOM match. The testing and bring-up plan was finalized with detailed validation procedures. The hardware interface specification document was completed. Lab workspace preparation is underway. We may have 1 board produced that is just usb connectors so we can verify that all the requirements for USB 3 super speed are setup in place. And we could also use this board for the demo, as USB 3 is more critical than power cycling.
Software Progress: Apollo demonstrated a working prototype that communicates with the FTDI chip and controls GPIO pins, validating the PyFTDI interface approach. However, core recovery functionality including data capture algorithms, file system reconstruction, and error handling remain incomplete. Mars will now assist with software development during the hardware fabrication period to accelerate progress and catch up to schedule.
Integration: The team reviewed hardware-software interface requirements and updated documentation to reflect the component change and revised timeline. The primary focus moving forward is accelerating software development over the next two weeks to enable on-schedule integration testing when boards arrive mid-November.