techdocs
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techdocs [2014/01/11 15:23] rachata |
techdocs [2015/01/10 21:00] kevincha |
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| ===== Processor Manuals ===== | ===== Processor Manuals ===== | ||
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| + | ==== MIPS ==== | ||
| + | Throughout this course, we will use the MIPS Architecture Reference Manual as the definitive specification for the MIPS ISA. All other MIPS-related material provided below are only for your benefit. | ||
| + | |||
| + | * {{mips_r4000_users_manual.pdf| (1.5MB) MIPS R4000 Microprocessor User’s Manual (1994)}} | ||
| + | * {{mips_reference_data.pdf|MIPS Cheat Sheet (from P&H)}} | ||
| + | * {{mips_tutorial.pdf|MIPS Tutorial (pdf)}} | ||
| + | * {{mips_tutorial.ppt|MIPS Tutorial (ppt)}} | ||
| ==== x86 ==== | ==== x86 ==== | ||
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| * {{vax_archhbkvol1_1977.pdf|(11MB) VAX11/780 Architecture Handbook (1977)}} | * {{vax_archhbkvol1_1977.pdf|(11MB) VAX11/780 Architecture Handbook (1977)}} | ||
| * {{vax_hwhbk_1979.pdf|(15MB) VAX11/780 Hardware Handbook (1979)}} | * {{vax_hwhbk_1979.pdf|(15MB) VAX11/780 Hardware Handbook (1979)}} | ||
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| + | ==== LC-3b (from Patt and Patel) ==== | ||
| + | * (CMU WebISO) [[http://www.ece.cmu.edu/~ece447/cmu_only/pp-appendixa.pdf|P&P Appendix A (The LC-3b ISA)]] | ||
| + | * (CMU WebISO) [[http://www.ece.cmu.edu/~ece447/cmu_only/pp-appendixc.pdf|P&P Appendix C (The Microarchitecture of the LC-3b, Basic Machine)]] | ||
| + | * {{lc3b-figures.pdf|LC-3b Figures from Appendix C}} | ||
| + | * {{18447-lc3b-pipelining.pdf|Pipelined LC-3b Microarchitecture}} | ||
| ===== Software Tools ===== | ===== Software Tools ===== | ||
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| Virtex-5, Spartan-3, and Newer CPLD Devices 14.2 (2010)]] | Virtex-5, Spartan-3, and Newer CPLD Devices 14.2 (2010)]] | ||
| - | ===== Verilog Tutorials ===== | + | ==== System Verilog Tutorials ==== |
| + | * {{http://www.asic-world.com/systemverilog/tutorial.html|ASIC World System Verilog Tutorial}} | ||
| + | * {{http://www.eda.org/sv/SystemVerilog_3.1a.pdf|SystemVerilog 3.1a Language Reference Manual}} | ||
| + | |||
| + | ==== Verilog Tutorials ==== | ||
| + | While this class will focus on System Verilog, these Verilog manuals are useful for additional studies: | ||
| * {{synth-verilog-cummins.pdf|Cummings, Nonblocking Assignments in Verilog Synthesis, Coding Styles That Kill}} | * {{synth-verilog-cummins.pdf|Cummings, Nonblocking Assignments in Verilog Synthesis, Coding Styles That Kill}} | ||
| * {{goodrtl-parkin.pdf|Parkin, Writing Successful RTL Descriptions in Verilog}} | * {{goodrtl-parkin.pdf|Parkin, Writing Successful RTL Descriptions in Verilog}} | ||
| * {{18447-sv-to-verilog.pdf|18-447 Handout: Moving from System Verilog to Verilog}} | * {{18447-sv-to-verilog.pdf|18-447 Handout: Moving from System Verilog to Verilog}} | ||
| * [[http://users.ece.utexas.edu/~patt/12s.382N/tools/verilog_manual.html|Online Verilog Manual (UT-Austin EE 382N)]] | * [[http://users.ece.utexas.edu/~patt/12s.382N/tools/verilog_manual.html|Online Verilog Manual (UT-Austin EE 382N)]] | ||
techdocs.txt · Last modified: 2015/04/20 22:40 by rachata
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