Modelsim Verilog Simulation Instructions

At the unix prompt in your working directory, type: vlib work

This creates the libraries directory, called work, that will store the files for your simulation.

Next, type: vlog file.v

This compiles the files into the work directory.

Next, type: vsim top_module_name

This will bring up the GUI for the modelsim simulator.

Execute the following commands:

  1. View/All
  2. Drag all the signals from the "Signals" window into the "Wave" window. They should appear on the left.
  3. Run/Run - All
  4. When the window appears asking you to quit, say No. This allows you to inspect the wave window.

    5. The simulations should succeed. Harness runs for 500 cycles until it decides that it has tested the multiplier enough. To print out the wave forms, perform the following:

  5. Zoom/Zoom Full
    6. This shows the entire test sequence
  6. Zoom/Zoom Range...

    7. Specify the first 1500 ns

  7. File/Write Postscript...
    8. Generate a PostScript file of the current view. Print this out and turn it in.
In the VSIM window, (in the upper left), hit:
  1. File/Exit